| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a73.h | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|
| H A D | cortex_a53.h | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|
| H A D | cortex_a72.h | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|
| H A D | cortex_a57.h | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a73.S | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|
| H A D | cortex_a72.S | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|
| H A D | cortex_a53.S | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|
| H A D | cortex_a57.S | 84629f2f2cf73b6d6180fc8a234f1ea9d423b280 Fri Jul 01 07:22:41 UTC 2016 Naga Sureshkumar Relli <nagasure@xilinx.com> bl31: Add error reporting registers
This patch adds cpumerrsr_el1 and l2merrsr_el1 to the register dump on
error for applicable CPUs.
These registers hold the ECC errors on L1 and L2 caches.
This patch updates the A53, A57, A72, A73 (l2merrsr_el1 only) CPU libraries.
Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
|