Searched hist:"6 cb8be17a53f4e11880ba13b78fca15895281cfe" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | neoverse_n2.h | 6cb8be17a53f4e11880ba13b78fca15895281cfe Tue Oct 17 10:56:01 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N2 erratum 2346952
Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest
Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
|
| /rk3399_ARM-atf/services/std_svc/errata_abi/ |
| H A D | errata_abi_main.c | 6cb8be17a53f4e11880ba13b78fca15895281cfe Tue Oct 17 10:56:01 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N2 erratum 2346952
Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest
Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_n2.S | 6cb8be17a53f4e11880ba13b78fca15895281cfe Tue Oct 17 10:56:01 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N2 erratum 2346952
Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest
Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 6cb8be17a53f4e11880ba13b78fca15895281cfe Tue Oct 17 10:56:01 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N2 erratum 2346952
Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest
Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 6cb8be17a53f4e11880ba13b78fca15895281cfe Tue Oct 17 10:56:01 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Neoverse N2 erratum 2346952
Neoverse N2 erratum 2346952 is a Cat B erratum that applies to all
revisions <= r0p2 and is fixed in r0p3.
The workaround is to set L2 TQ size statically to it's full size.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-1982442/latest
Change-Id: I03c3cf1f951fbc906fdebcb99a523c5ac8ba055d
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
|