| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3576/ |
| H A D | clk_rk3576.c | 0265e00cde74339f5cc1002fcda53b7424d41c33 Tue Oct 24 03:24:35 UTC 2023 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add rk3576 clock driver
Add basic clock for rk3576 which including cpu, mmc, i2c,
pwm ...clocks init.
- init spll\ppll\cpll\cci in spl
- fix cci init
- fix up spll
- fix the dclk setting rule
- relase bigcore biu\cru\grf in spl
- add ufs ref clk setting
- Remove PCIe relevant
- fix hdmi phy name
- add dsihost and ebc clk setting
- add dsihot getting
- fix dclk getting freq error
Change-Id: I2658bf3f77f6386a6f124f624a0658d61cf90fc2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| /rk3399_rockchip-uboot/include/dt-bindings/clock/ |
| H A D | rockchip,rk3576-cru.h | 0265e00cde74339f5cc1002fcda53b7424d41c33 Tue Oct 24 03:24:35 UTC 2023 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add rk3576 clock driver
Add basic clock for rk3576 which including cpu, mmc, i2c,
pwm ...clocks init.
- init spll\ppll\cpll\cci in spl
- fix cci init
- fix up spll
- fix the dclk setting rule
- relase bigcore biu\cru\grf in spl
- add ufs ref clk setting
- Remove PCIe relevant
- fix hdmi phy name
- add dsihost and ebc clk setting
- add dsihot getting
- fix dclk getting freq error
Change-Id: I2658bf3f77f6386a6f124f624a0658d61cf90fc2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rk3576.h | 0265e00cde74339f5cc1002fcda53b7424d41c33 Tue Oct 24 03:24:35 UTC 2023 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add rk3576 clock driver
Add basic clock for rk3576 which including cpu, mmc, i2c,
pwm ...clocks init.
- init spll\ppll\cpll\cci in spl
- fix cci init
- fix up spll
- fix the dclk setting rule
- relase bigcore biu\cru\grf in spl
- add ufs ref clk setting
- Remove PCIe relevant
- fix hdmi phy name
- add dsihost and ebc clk setting
- add dsihot getting
- fix dclk getting freq error
Change-Id: I2658bf3f77f6386a6f124f624a0658d61cf90fc2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| H A D | cru_rk3588.h | 0265e00cde74339f5cc1002fcda53b7424d41c33 Tue Oct 24 03:24:35 UTC 2023 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add rk3576 clock driver
Add basic clock for rk3576 which including cpu, mmc, i2c,
pwm ...clocks init.
- init spll\ppll\cpll\cci in spl
- fix cci init
- fix up spll
- fix the dclk setting rule
- relase bigcore biu\cru\grf in spl
- add ufs ref clk setting
- Remove PCIe relevant
- fix hdmi phy name
- add dsihost and ebc clk setting
- add dsihot getting
- fix dclk getting freq error
Change-Id: I2658bf3f77f6386a6f124f624a0658d61cf90fc2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3576.c | 0265e00cde74339f5cc1002fcda53b7424d41c33 Tue Oct 24 03:24:35 UTC 2023 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add rk3576 clock driver
Add basic clock for rk3576 which including cpu, mmc, i2c,
pwm ...clocks init.
- init spll\ppll\cpll\cci in spl
- fix cci init
- fix up spll
- fix the dclk setting rule
- relase bigcore biu\cru\grf in spl
- add ufs ref clk setting
- Remove PCIe relevant
- fix hdmi phy name
- add dsihost and ebc clk setting
- add dsihot getting
- fix dclk getting freq error
Change-Id: I2658bf3f77f6386a6f124f624a0658d61cf90fc2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| H A D | Makefile | 0265e00cde74339f5cc1002fcda53b7424d41c33 Tue Oct 24 03:24:35 UTC 2023 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add rk3576 clock driver
Add basic clock for rk3576 which including cpu, mmc, i2c,
pwm ...clocks init.
- init spll\ppll\cpll\cci in spl
- fix cci init
- fix up spll
- fix the dclk setting rule
- relase bigcore biu\cru\grf in spl
- add ufs ref clk setting
- Remove PCIe relevant
- fix hdmi phy name
- add dsihost and ebc clk setting
- add dsihot getting
- fix dclk getting freq error
Change-Id: I2658bf3f77f6386a6f124f624a0658d61cf90fc2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| H A D | clk_rk3588.c | 0265e00cde74339f5cc1002fcda53b7424d41c33 Tue Oct 24 03:24:35 UTC 2023 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: Add rk3576 clock driver
Add basic clock for rk3576 which including cpu, mmc, i2c,
pwm ...clocks init.
- init spll\ppll\cpll\cci in spl
- fix cci init
- fix up spll
- fix the dclk setting rule
- relase bigcore biu\cru\grf in spl
- add ufs ref clk setting
- Remove PCIe relevant
- fix hdmi phy name
- add dsihost and ebc clk setting
- add dsihot getting
- fix dclk getting freq error
Change-Id: I2658bf3f77f6386a6f124f624a0658d61cf90fc2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|