Searched +full:sun50i +full:- +full:a64 +full:- +full:de2 (Results 1 – 15 of 15) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A64 Display Engine Bus Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>15 pattern: "^bus(@[0-9a-f]+)?$"17 "#address-cells":20 "#size-cells":[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-de2-mixer.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 - allwinner,sun8i-a83t-de2-mixer-017 - allwinner,sun8i-a83t-de2-mixer-118 - allwinner,sun8i-h3-de2-mixer-019 - allwinner,sun8i-r40-de2-mixer-0[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-r-ccu.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/reset/sun50i-a64-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/reset/sun8i-r-ccu.h>13 #include <dt-bindings/thermal/thermal.h>16 interrupt-parent = <&gic>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/clock/sun50i-h6-ccu.h>6 #include <dt-bindings/clock/sun50i-h6-r-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-tcon-top.h>9 #include <dt-bindings/reset/sun50i-h6-ccu.h>10 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/thermal/thermal.h>[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)4 #include <arm/sunxi-h3-h5.dtsi>6 #include <dt-bindings/thermal/thermal.h>10 #address-cells = <1>;11 #size-cells = <0>;14 compatible = "arm,cortex-a53";17 enable-method = "psci";19 clock-latency-ns = <244144>; /* 8 32k periods */20 #cooling-cells = <2>;24 compatible = "arm,cortex-a53";[all …]
1 # SPDX-License-Identifier: GPL-2.0+3 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#clock-cells":17 "#reset-cells":22 - const: allwinner,sun8i-a83t-de2-clk23 - const: allwinner,sun8i-h3-de2-clk[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/media/allwinner,sun8i-a83t-de2-rotate.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A83T DE2 Rotate Device Tree Bindings10 - Jernej Skrabec <jernej.skrabec@siol.net>11 - Chen-Yu Tsai <wens@csie.org>12 - Maxime Ripard <mripard@kernel.org>14 description: |-15 The Allwinner A83T and A64 have a rotation core used for[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Allwinner A64 Display Engine 2.0 Bus Driver14 struct device_node *np = pdev->dev.of_node; in sun50i_de2_bus_probe()17 ret = sunxi_sram_claim(&pdev->dev); in sun50i_de2_bus_probe()19 dev_err(&pdev->dev, "Error couldn't map SRAM to device\n"); in sun50i_de2_bus_probe()23 of_platform_populate(np, NULL, NULL, &pdev->dev); in sun50i_de2_bus_probe()30 sunxi_sram_release(&pdev->dev); in sun50i_de2_bus_remove()35 { .compatible = "allwinner,sun50i-a64-de2", },43 .name = "sun50i-de2-bus",
1 // SPDX-License-Identifier: GPL-2.0-or-later11 #include <linux/dma-mapping.h>89 /* for DE2 VI layer which ignores alpha */98 /* for DE2 VI layer which ignores alpha */107 /* for DE2 VI layer which ignores alpha */116 /* for DE2 VI layer which ignores alpha */125 /* for DE2 VI layer which ignores alpha */134 /* for DE2 VI layer which ignores alpha */143 /* for DE2 VI layer which ignores alpha */152 /* for DE2 VI layer which ignores alpha */[all …]
1 # SPDX-License-Identifier: GPL-2.03 obj-y += ccu_common.o4 obj-y += ccu_mmc_timing.o5 obj-y += ccu_reset.o8 obj-y += ccu_div.o9 obj-y += ccu_frac.o10 obj-y += ccu_gate.o11 obj-y += ccu_mux.o12 obj-y += ccu_mult.o13 obj-y += ccu_phase.o[all …]
1 // SPDX-License-Identifier: GPL-2.0-only7 #include <linux/clk-provider.h>18 #include "ccu-sun8i-de2.h"20 static SUNXI_CCU_GATE(bus_mixer0_clk, "bus-mixer0", "bus-de",22 static SUNXI_CCU_GATE(bus_mixer1_clk, "bus-mixer1", "bus-de",24 static SUNXI_CCU_GATE(bus_wb_clk, "bus-wb", "bus-de",26 static SUNXI_CCU_GATE(bus_rot_clk, "bus-rot", "bus-de",29 static SUNXI_CCU_GATE(mixer0_clk, "mixer0", "mixer0-div",31 static SUNXI_CCU_GATE(mixer1_clk, "mixer1", "mixer1-div",33 static SUNXI_CCU_GATE(wb_clk, "wb", "wb-div",[all …]
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/interrupt-controller/arm-gic.h>45 #include <dt-bindings/clock/sun8i-de2.h>46 #include <dt-bindings/clock/sun8i-r40-ccu.h>47 #include <dt-bindings/clock/sun8i-tcon-top.h>48 #include <dt-bindings/reset/sun8i-r40-ccu.h>49 #include <dt-bindings/reset/sun8i-de2.h>50 #include <dt-bindings/thermal/thermal.h>53 #address-cells = <1>;[all …]
6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com>62 .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2,76 SUNXI_SRAM_MAP(1, 1, "usb-otg")),82 SUNXI_SRAM_MAP(0, 1, "de2")),87 .compatible = "allwinner,sun4i-a10-sram-a3-a4",91 .compatible = "allwinner,sun4i-a10-sram-c1",95 .compatible = "allwinner,sun4i-a10-sram-d",99 .compatible = "allwinner,sun50i-a64-sram-c",120 seq_puts(s, "--------------------\n\n"); in sunxi_sram_show()122 for_each_child_of_node(sram_dev->of_node, sram_node) { in sunxi_sram_show()[all …]
4 default "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds" if !ARM6412 ---help---24 ---help---26 as the original A10 (mach-sun4i).30 ---help---37 ---help---40 not have official open-source DRAM initialization code, but can46 ---help---48 have only 16-bit memory buswidth.52 ---help---[all …]
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