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/OK3568_Linux_fs/u-boot/drivers/net/phy/
H A Dmicrel_ksz90x1.c4 * SPDX-License-Identifier: GPL-2.0+
6 * Copyright 2010-2011 Freescale Semiconductor, Inc.
23 * KSZ9021 - KSZ9031 common
57 phydev->duplex = DUPLEX_FULL; in ksz90xx_startup()
59 phydev->duplex = DUPLEX_HALF; in ksz90xx_startup()
62 phydev->speed = SPEED_1000; in ksz90xx_startup()
64 phydev->speed = SPEED_100; in ksz90xx_startup()
66 phydev->speed = SPEED_10; in ksz90xx_startup()
87 { "rxd0-skew-ps", 4, 0, 0x7 }, { "rxd1-skew-ps", 4, 4, 0x7 },
88 { "rxd2-skew-ps", 4, 8, 0x7 }, { "rxd3-skew-ps", 4, 12, 0x7 }
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/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
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/OK3568_Linux_fs/kernel/drivers/usb/serial/
H A Dch341.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2007, Frank A Kingswood <frank@kingswood-consulting.co.uk>
4 * Copyright 2007, Werner Cornelius <werner@cornelius-consult.de>
10 * serial port, an IEEE-1284 parallel printer port or a memory-like
27 /* flags for IO-Bits */
51 /* Break support - the information used to implement this was gleaned from
116 dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x)\n", __func__, in ch341_control_out()
123 dev_err(&dev->dev, "failed to send control message: %d\n", r); in ch341_control_out()
134 dev_dbg(&dev->dev, "%s - (%02x,%04x,%04x,%u)\n", __func__, in ch341_control_in()
142 dev_err(&dev->dev, in ch341_control_in()
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/OK3568_Linux_fs/kernel/drivers/usb/host/
H A Dehci-sched.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2004 by David Brownell
4 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
7 /* this file is part of ehci-hcd.c */
9 /*-------------------------------------------------------------------------*/
21 * pre-calculated schedule data to make appending to the queue be quick.
27 * periodic_next_shadow - return "next" pointer on shadow list
37 return &periodic->qh->qh_next; in periodic_next_shadow()
39 return &periodic->fstn->fstn_next; in periodic_next_shadow()
41 return &periodic->itd->itd_next; in periodic_next_shadow()
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H A Dehci-q.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2001-2004 by David Brownell
6 /* this file is part of ehci-hcd.c */
8 /*-------------------------------------------------------------------------*/
14 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
20 * an ongoing challenge. That's in "ehci-sched.c".
25 * buffer low/full speed data so the host collects it at high speed.
28 /*-------------------------------------------------------------------------*/
30 /* PID Codes that are used here, from EHCI specification, Table 3-16. */
44 qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr); in qtd_fill()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/net/
H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
16 local-mac-address:
19 $ref: /schemas/types.yaml#definitions/uint8-array
21 - minItems: 6
24 mac-address:
29 local-mac-address property.
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H A Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
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/OK3568_Linux_fs/kernel/drivers/net/phy/
H A Dmotorcomm.c1 // SPDX-License-Identifier: GPL-2.0+
37 /* TX Gig-E Delay is bits 7:4, default 0x5
38 * TX Fast-E Delay is bits 15:12, default 0xf
39 * Delay = 150ps * N - 250ps
40 * On = 2000ps, off = 50ps
133 switch (phydev->interface) { in yt8511_config_init()
151 ret = -EOPNOTSUPP; in yt8511_config_init()
239 struct device_node *node = phydev->mdio.dev.of_node; in yt8512_clk_init()
244 if (node && node->parent && node->parent->parent) { in yt8512_clk_init()
245 ret = of_property_read_string(node->parent->parent, in yt8512_clk_init()
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H A Dmicrel.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2010-2013 Micrel, Inc.
160 const struct kszphy_type *type = phydev->drv->driver_data; in kszphy_config_intr()
164 if (type && type->interrupt_level_mask) in kszphy_config_intr()
165 mask = type->interrupt_level_mask; in kszphy_config_intr()
177 if (phydev->interrupts == PHY_INTERRUPT_ENABLED) in kszphy_config_intr()
213 return -EINVAL; in kszphy_setup_led()
233 * unique (non-broadcast) address on a shared bus.
274 struct kszphy_priv *priv = phydev->priv; in kszphy_config_reset()
277 if (priv->rmii_ref_clk_sel) { in kszphy_config_reset()
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/OK3568_Linux_fs/u-boot/drivers/ddr/fsl/
H A Dddr3_dimm_params.c2 * Copyright 2008-2012 Freescale Semiconductor, Inc.
7 * JEDEC standard No.21-C 4_01_02_11R18.pdf
9 * SPDX-License-Identifier: GPL-2.0
28 * SPD byte4 - sdram density and banks
38 * SPD byte8 - module memory bus width
45 * SPD byte7 - module organiztion
62 if ((spd->density_banks & 0xf) < 7) in compute_ranksize()
63 nbit_sdram_cap_bsize = (spd->density_banks & 0xf) + 28; in compute_ranksize()
64 if ((spd->bus_width & 0x7) < 4) in compute_ranksize()
65 nbit_primary_bus_width = (spd->bus_width & 0x7) + 3; in compute_ranksize()
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H A Dlc_common_dimm_params.c2 * Copyright 2008-2014 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0
39 if (mclk_ps < outpdimm->tckmin_x_ps) { in compute_cas_latency()
40 printf("DDR clock (MCLK cycle %u ps) is faster than " in compute_cas_latency()
41 "the slowest DIMM(s) (tCKmin %u ps) can support.\n", in compute_cas_latency()
42 mclk_ps, outpdimm->tckmin_x_ps); in compute_cas_latency()
45 if (mclk_ps > outpdimm->tckmax_ps) { in compute_cas_latency()
46 printf("DDR clock (MCLK cycle %u ps) is slower than DIMM(s) (tCKmax %u ps) can support.\n", in compute_cas_latency()
47 mclk_ps, outpdimm->tckmax_ps); in compute_cas_latency()
51 caslat_actual = (outpdimm->taamin_ps + mclk_ps - 1) / mclk_ps; in compute_cas_latency()
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H A Dddr2_dimm_params.c4 * SPDX-License-Identifier: GPL-2.0
19 * --- ----- ------
47 * Convert a two-nibble BCD value into a cycle time.
48 * While the spec calls for nano-seconds, picos are returned.
81 unsigned int ps = whole_ns * 1000 + tenths_ps[tenth_ns]; in convert_bcd_tenths_to_cycle_time_ps() local
83 return ps; in convert_bcd_tenths_to_cycle_time_ps()
91 unsigned int ps = tenth_ns * 100 + hundredth_ns * 10; in convert_bcd_hundredths_to_cycle_time_ps() local
93 return ps; in convert_bcd_hundredths_to_cycle_time_ps()
149 * shortest SPD-defined CAS latency.
153 * Do this by finding in the standard speed bin table the longest
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/amd/
H A Dau1000_eth.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright 2001-2003, 2006 MontaVista Software Inc.
8 * Added ethtool/mii-tool support,
11 * or riemer@riemer-nt.de: fixed the link beat detection with
14 * converted to use linux-2.6.x's PHY framework
22 #include <linux/dma-mapping.h>
67 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
202 * make sure there's no out-of-order writes, and that all writes
207 * board-specific configurations
221 * needed in case of a dual-PHY accessible only through the MAC0's MII
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/OK3568_Linux_fs/u-boot/include/
H A Dgeneric-phy-mipi-dphy.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
13 * MIPI D-PHY phy.
20 * Clock transitions and disable the Clock Lane HS-RX.
22 * Maximum value: 60000 ps
34 * Minimum value: 60000 ps + 52 * @hs_clk_rate period in ps
53 * Lane LP-00 Line state immediately before the HS-0 Line
56 * Minimum value: 38000 ps
57 * Maximum value: 95000 ps
68 * Minimum value: 95000 ps
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/ddr/
H A Dlpddr2-timings.txt1 * AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
4 - compatible : Should be "jedec,lpddr2-timings"
5 - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
6 - max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32>
11 data-sheet of the device for a given speed-bin. All these properties are
12 of type <u32> and the default unit is ps (pico seconds). Parameters with
13 a different unit have a suffix indicating the unit such as 'tRAS-max-ns'
14 - tRCD
15 - tWR
16 - tRAS-min
[all …]
H A Dlpddr3-timings.txt1 * AC timing parameters of LPDDR3 memories for a given speed-bin.
6 - compatible : Should be "jedec,lpddr3-timings"
7 - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
8 - reg : maximum DDR clock frequency for the speed-bin. Type is <u32>
13 data-sheet of the device for a given speed-bin. All these properties are
14 of type <u32> and the default unit is ps (pico seconds).
15 - tRFC
16 - tRRD
17 - tRPab
18 - tRPpb
[all …]
/OK3568_Linux_fs/kernel/include/linux/phy/
H A Dphy-mipi-dphy.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * struct phy_configure_opts_mipi_dphy - MIPI D-PHY configuration set
13 * MIPI D-PHY phy.
20 * Clock transitions and disable the Clock Lane HS-RX.
22 * Maximum value: 60000 ps
34 * Minimum value: 60000 ps + 52 * @hs_clk_rate period in ps
53 * Lane LP-00 Line state immediately before the HS-0 Line
56 * Minimum value: 38000 ps
57 * Maximum value: 95000 ps
68 * Minimum value: 95000 ps
[all …]
/OK3568_Linux_fs/kernel/drivers/usb/core/
H A Ddevio.c1 // SPDX-License-Identifier: GPL-2.0+
5 * devio.c -- User space communication with USB devices.
7 * Copyright (C) 1999-2000 Thomas Sailer (sailer@ife.ee.ethz.ch)
18 * 30.09.2005 0.3 Fix user-triggerable oops in async URB delivery
19 * (CAN-2005-3055)
41 #include <linux/dma-mapping.h>
55 #define USB_SG_SIZE 16384 /* split-size for large txs */
57 /* Mutual exclusion for ps->list in resume vs. release and remove */
90 struct usb_dev_state *ps; member
95 struct usb_dev_state *ps; member
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/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun9i.c4 * (C) Copyright 2007-2015
9 * Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
11 * SPDX-License-Identifier: GPL-2.0+
29 * Allwinner as part of the open-source bootloader release (refer to
30 * https://github.com/allwinner-zh/bootloader.git) and augments the upstream
39 * Note that the Zynq-documentation provides a very close match for the DDR
45 * (i.e. the rules for MEMC_FREQ_RATIO=2 from the Zynq-documentation apply).
51 * 1) Only DDR3 support is implemented, as our test platform (the A80-Q7
53 * 2) Only 2T-mode has been implemented and tested.
65 * The driver should be driven from a device-tree based configuration that
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/OK3568_Linux_fs/u-boot/board/xes/xpedite537x/
H A Dddr.c5 * SPDX-License-Identifier: GPL-2.0+
21 * There are four board-specific SDRAM timing parameters which must be
24 * - TIMING_CFG_2 register
26 * chip-specific internal delays.
28 * - TIMING_CFG_2 register
34 * - DDR_SDRAM_CLK_CNTL register
37 * - TIMING_CFG_2 register
39 * Usually only needed with heavy load/very high speed (>DDR2-800)
41 * ====== XPedite5370 DDR2-600 read delay calculations ======
44 * contains the chip-specific delays for 8548E, 8572, etc.
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dradeon_pm.c24 #include <linux/hwmon-sysfs.h>
61 int found_instance = -1; in radeon_pm_get_type_index()
63 for (i = 0; i < rdev->pm.num_power_states; i++) { in radeon_pm_get_type_index()
64 if (rdev->pm.power_state[i].type == ps_type) { in radeon_pm_get_type_index()
71 return rdev->pm.default_power_state_index; in radeon_pm_get_type_index()
76 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) { in radeon_pm_acpi_event_handler()
77 mutex_lock(&rdev->pm.mutex); in radeon_pm_acpi_event_handler()
79 rdev->pm.dpm.ac_power = true; in radeon_pm_acpi_event_handler()
81 rdev->pm.dpm.ac_power = false; in radeon_pm_acpi_event_handler()
82 if (rdev->family == CHIP_ARUBA) { in radeon_pm_acpi_event_handler()
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/OK3568_Linux_fs/kernel/drivers/net/dsa/
H A Ddsa_loop.c1 // SPDX-License-Identifier: GPL-2.0-or-later
37 struct dsa_loop_priv *ps = priv; in dsa_loop_devlink_vtu_get() local
41 for (i = 0; i < ARRAY_SIZE(ps->vlans); i++) { in dsa_loop_devlink_vtu_get()
42 vl = &ps->vlans[i]; in dsa_loop_devlink_vtu_get()
43 if (vl->members) in dsa_loop_devlink_vtu_get()
53 struct dsa_loop_priv *ps = ds->priv; in dsa_loop_setup_devlink_resources() local
56 devlink_resource_size_params_init(&size_params, ARRAY_SIZE(ps->vlans), in dsa_loop_setup_devlink_resources()
57 ARRAY_SIZE(ps->vlans), in dsa_loop_setup_devlink_resources()
60 err = dsa_devlink_resource_register(ds, "VTU", ARRAY_SIZE(ps->vlans), in dsa_loop_setup_devlink_resources()
69 dsa_loop_devlink_vtu_get, ps); in dsa_loop_setup_devlink_resources()
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/OK3568_Linux_fs/u-boot/drivers/i2c/
H A Dzynq_i2c.c2 * Driver for the Zynq-7000 PS I2C controller
3 * IP from Cadence (ID T-CS-PE-0007-100, Version R1p10f2)
8 * Copyright (c) 2012-2013 Xilinx, Michal Simek
10 * SPDX-License-Identifier: GPL-2.0+
13 * Please see doc/driver-model/i2c-howto.txt for instructions.
72 return adap->hwadapnr ? in i2c_select()
73 /* Zynq PS I2C1 */ in i2c_select()
75 /* Zynq PS I2C0 */ in i2c_select()
87 (2 << ZYNQ_I2C_CONTROL_DIV_A_SHIFT), &zynq_i2c->control); in zynq_i2c_init()
89 /* Enable master mode, ack, and 7-bit addressing */ in zynq_i2c_init()
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/
H A Dmt2712-evb.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
14 compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
26 stdout-path = "serial0:921600n8";
30 compatible = "regulator-fixed";
31 regulator-name = "vproc_buck0";
32 regulator-min-microvolt = <1000000>;
33 regulator-max-microvolt = <1000000>;
37 compatible = "regulator-fixed";
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/OK3568_Linux_fs/external/dpdk/gmac/kernel4.19/
H A Dkernel_net_stmmac.diff2 From: David Wu <david.wu@rock-chips.com>
9 Signed-off-by: David Wu <david.wu@rock-chips.com>
10 Change-Id: I19975b10e2ed12931edc2e8bd50c003416a1109c
11 ---
13 diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kcon…
15 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
17 @@ -12,6 +12,13 @@
31 diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Mak…
33 --- a/drivers/net/ethernet/stmicro/stmmac/Makefile
35 @@ -25,6 +25,7 @@
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