xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/mediatek/mt2712-evb.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2017 MediaTek Inc.
3*4882a593Smuzhiyun * Author: YT Shen <yt.shen@mediatek.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * SPDX-License-Identifier: (GPL-2.0 OR MIT)
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
10*4882a593Smuzhiyun#include "mt2712e.dtsi"
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "MediaTek MT2712 evaluation board";
14*4882a593Smuzhiyun	compatible = "mediatek,mt2712-evb", "mediatek,mt2712";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	aliases {
17*4882a593Smuzhiyun		serial0 = &uart0;
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory@40000000 {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0 0x40000000 0 0x80000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun	chosen {
26*4882a593Smuzhiyun		stdout-path = "serial0:921600n8";
27*4882a593Smuzhiyun	};
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	cpus_fixed_vproc0: fixedregulator@0 {
30*4882a593Smuzhiyun		compatible = "regulator-fixed";
31*4882a593Smuzhiyun		regulator-name = "vproc_buck0";
32*4882a593Smuzhiyun		regulator-min-microvolt = <1000000>;
33*4882a593Smuzhiyun		regulator-max-microvolt = <1000000>;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	cpus_fixed_vproc1: fixedregulator@1 {
37*4882a593Smuzhiyun		compatible = "regulator-fixed";
38*4882a593Smuzhiyun		regulator-name = "vproc_buck1";
39*4882a593Smuzhiyun		regulator-min-microvolt = <1000000>;
40*4882a593Smuzhiyun		regulator-max-microvolt = <1000000>;
41*4882a593Smuzhiyun	};
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	extcon_usb: extcon_iddig {
44*4882a593Smuzhiyun		compatible = "linux,extcon-usb-gpio";
45*4882a593Smuzhiyun		id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	extcon_usb1: extcon_iddig1 {
49*4882a593Smuzhiyun		compatible = "linux,extcon-usb-gpio";
50*4882a593Smuzhiyun		id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>;
51*4882a593Smuzhiyun	};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun	usb_p0_vbus: regulator@2 {
54*4882a593Smuzhiyun		compatible = "regulator-fixed";
55*4882a593Smuzhiyun		regulator-name = "p0_vbus";
56*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
57*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
58*4882a593Smuzhiyun		gpio = <&pio 13 GPIO_ACTIVE_HIGH>;
59*4882a593Smuzhiyun		enable-active-high;
60*4882a593Smuzhiyun	};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun	usb_p1_vbus: regulator@3 {
63*4882a593Smuzhiyun		compatible = "regulator-fixed";
64*4882a593Smuzhiyun		regulator-name = "p1_vbus";
65*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
66*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
67*4882a593Smuzhiyun		gpio = <&pio 15 GPIO_ACTIVE_HIGH>;
68*4882a593Smuzhiyun		enable-active-high;
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	usb_p2_vbus: regulator@4 {
72*4882a593Smuzhiyun		compatible = "regulator-fixed";
73*4882a593Smuzhiyun		regulator-name = "p2_vbus";
74*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
75*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
76*4882a593Smuzhiyun		gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
77*4882a593Smuzhiyun		enable-active-high;
78*4882a593Smuzhiyun	};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun	usb_p3_vbus: regulator@5 {
81*4882a593Smuzhiyun		compatible = "regulator-fixed";
82*4882a593Smuzhiyun		regulator-name = "p3_vbus";
83*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
84*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
85*4882a593Smuzhiyun		gpio = <&pio 17 GPIO_ACTIVE_HIGH>;
86*4882a593Smuzhiyun		enable-active-high;
87*4882a593Smuzhiyun		regulator-always-on;
88*4882a593Smuzhiyun	};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun&auxadc {
93*4882a593Smuzhiyun	status = "okay";
94*4882a593Smuzhiyun};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun&cpu0 {
97*4882a593Smuzhiyun	proc-supply = <&cpus_fixed_vproc0>;
98*4882a593Smuzhiyun};
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun&cpu1 {
101*4882a593Smuzhiyun	proc-supply = <&cpus_fixed_vproc0>;
102*4882a593Smuzhiyun};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun&cpu2 {
105*4882a593Smuzhiyun	proc-supply = <&cpus_fixed_vproc1>;
106*4882a593Smuzhiyun};
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun&eth {
109*4882a593Smuzhiyun	phy-mode ="rgmii-rxid";
110*4882a593Smuzhiyun	phy-handle = <&ethernet_phy0>;
111*4882a593Smuzhiyun	mediatek,tx-delay-ps = <1530>;
112*4882a593Smuzhiyun	snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>;
113*4882a593Smuzhiyun	pinctrl-names = "default", "sleep";
114*4882a593Smuzhiyun	pinctrl-0 = <&eth_default>;
115*4882a593Smuzhiyun	pinctrl-1 = <&eth_sleep>;
116*4882a593Smuzhiyun	status = "okay";
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun	mdio {
119*4882a593Smuzhiyun		compatible = "snps,dwmac-mdio";
120*4882a593Smuzhiyun		#address-cells = <1>;
121*4882a593Smuzhiyun		#size-cells = <0>;
122*4882a593Smuzhiyun		ethernet_phy0: ethernet-phy@5 {
123*4882a593Smuzhiyun			compatible = "ethernet-phy-id0243.0d90";
124*4882a593Smuzhiyun			reg = <0x5>;
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun	};
127*4882a593Smuzhiyun};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun&pio {
130*4882a593Smuzhiyun	eth_default: eth_default {
131*4882a593Smuzhiyun		tx_pins {
132*4882a593Smuzhiyun			pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>,
133*4882a593Smuzhiyun				 <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>,
134*4882a593Smuzhiyun				 <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>,
135*4882a593Smuzhiyun				 <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>,
136*4882a593Smuzhiyun				 <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>,
137*4882a593Smuzhiyun				 <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>;
138*4882a593Smuzhiyun			drive-strength = <MTK_DRIVE_8mA>;
139*4882a593Smuzhiyun		};
140*4882a593Smuzhiyun		rx_pins {
141*4882a593Smuzhiyun			pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>,
142*4882a593Smuzhiyun				 <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>,
143*4882a593Smuzhiyun				 <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>,
144*4882a593Smuzhiyun				 <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>,
145*4882a593Smuzhiyun				 <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>,
146*4882a593Smuzhiyun				 <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>;
147*4882a593Smuzhiyun			input-enable;
148*4882a593Smuzhiyun		};
149*4882a593Smuzhiyun		mdio_pins {
150*4882a593Smuzhiyun			pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>,
151*4882a593Smuzhiyun				 <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>;
152*4882a593Smuzhiyun			drive-strength = <MTK_DRIVE_8mA>;
153*4882a593Smuzhiyun			input-enable;
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun	eth_sleep: eth_sleep {
158*4882a593Smuzhiyun		tx_pins {
159*4882a593Smuzhiyun			pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>,
160*4882a593Smuzhiyun				 <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>,
161*4882a593Smuzhiyun				 <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>,
162*4882a593Smuzhiyun				 <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>,
163*4882a593Smuzhiyun				 <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>,
164*4882a593Smuzhiyun				 <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>;
165*4882a593Smuzhiyun		};
166*4882a593Smuzhiyun		rx_pins {
167*4882a593Smuzhiyun			pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>,
168*4882a593Smuzhiyun				 <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>,
169*4882a593Smuzhiyun				 <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>,
170*4882a593Smuzhiyun				 <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>,
171*4882a593Smuzhiyun				 <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>,
172*4882a593Smuzhiyun				 <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>;
173*4882a593Smuzhiyun			input-disable;
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun		mdio_pins {
176*4882a593Smuzhiyun			pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>,
177*4882a593Smuzhiyun				 <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>;
178*4882a593Smuzhiyun			input-disable;
179*4882a593Smuzhiyun			bias-disable;
180*4882a593Smuzhiyun		};
181*4882a593Smuzhiyun	};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun	usb0_id_pins_float: usb0_iddig {
184*4882a593Smuzhiyun		pins_iddig {
185*4882a593Smuzhiyun			pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>;
186*4882a593Smuzhiyun			bias-pull-up;
187*4882a593Smuzhiyun		};
188*4882a593Smuzhiyun	};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun	usb1_id_pins_float: usb1_iddig {
191*4882a593Smuzhiyun		pins_iddig {
192*4882a593Smuzhiyun			pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>;
193*4882a593Smuzhiyun			bias-pull-up;
194*4882a593Smuzhiyun		};
195*4882a593Smuzhiyun	};
196*4882a593Smuzhiyun};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun&ssusb {
199*4882a593Smuzhiyun	vbus-supply = <&usb_p0_vbus>;
200*4882a593Smuzhiyun	extcon = <&extcon_usb>;
201*4882a593Smuzhiyun	dr_mode = "otg";
202*4882a593Smuzhiyun	wakeup-source;
203*4882a593Smuzhiyun	mediatek,u3p-dis-msk = <0x1>;
204*4882a593Smuzhiyun	//enable-manual-drd;
205*4882a593Smuzhiyun	//maximum-speed = "full-speed";
206*4882a593Smuzhiyun	pinctrl-names = "default";
207*4882a593Smuzhiyun	pinctrl-0 = <&usb0_id_pins_float>;
208*4882a593Smuzhiyun	status = "okay";
209*4882a593Smuzhiyun};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun&ssusb1 {
212*4882a593Smuzhiyun	vbus-supply = <&usb_p1_vbus>;
213*4882a593Smuzhiyun	extcon = <&extcon_usb1>;
214*4882a593Smuzhiyun	dr_mode = "otg";
215*4882a593Smuzhiyun	//mediatek,u3p-dis-msk = <0x1>;
216*4882a593Smuzhiyun	enable-manual-drd;
217*4882a593Smuzhiyun	wakeup-source;
218*4882a593Smuzhiyun	//maximum-speed = "full-speed";
219*4882a593Smuzhiyun	pinctrl-names = "default";
220*4882a593Smuzhiyun	pinctrl-0 = <&usb1_id_pins_float>;
221*4882a593Smuzhiyun	status = "okay";
222*4882a593Smuzhiyun};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun&uart0 {
225*4882a593Smuzhiyun	status = "okay";
226*4882a593Smuzhiyun};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun&usb_host0 {
229*4882a593Smuzhiyun	vbus-supply = <&usb_p2_vbus>;
230*4882a593Smuzhiyun	status = "okay";
231*4882a593Smuzhiyun};
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun&usb_host1 {
234*4882a593Smuzhiyun	status = "okay";
235*4882a593Smuzhiyun};
236