Searched +full:ether +full:- +full:r8a7790 (Results 1 – 10 of 10) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/net/renesas,ether.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - $ref: ethernet-controller.yaml#13 - Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>18 - items:19 - enum:20 - renesas,gether-r8a7740 # device is a part of R8A7740 SoC21 - renesas,gether-r8a77980 # device is a part of R8A77980 SoC[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>15 - items:16 - enum:17 - renesas,etheravb-r8a7742 # RZ/G1H18 - renesas,etheravb-r8a7743 # RZ/G1M19 - renesas,etheravb-r8a7744 # RZ/G1N20 - renesas,etheravb-r8a7745 # RZ/G1E[all …]
1 // SPDX-License-Identifier: GPL-2.08 /dts-v1/;9 #include "r8a7790.dtsi"10 #include <dt-bindings/gpio/gpio.h>11 #include <dt-bindings/input/input.h>15 compatible = "renesas,stout", "renesas,r8a7790";23 stdout-path = "serial0:115200n8";32 compatible = "gpio-leds";47 fixedregulator3v3: regulator-3v3 {48 compatible = "regulator-fixed";[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Device Tree Source for the R-Car H2 (R8A77900) SoC6 * Copyright (C) 2013-2014 Renesas Solutions Corp.10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>11 #include <dt-bindings/interrupt-controller/arm-gic.h>12 #include <dt-bindings/interrupt-controller/irq.h>13 #include <dt-bindings/power/r8a7790-sysc.h>16 compatible = "renesas,r8a7790";17 #address-cells = <2>;18 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2013-2014 Renesas Solutions Corp.7 * Copyright (C) 2015-2016 Renesas Electronics Corporation11 * SSI-AK464338 /dts-v1/;39 #include "r8a7790.dtsi"40 #include <dt-bindings/gpio/gpio.h>41 #include <dt-bindings/input/input.h>45 compatible = "renesas,lager", "renesas,r8a7790";63 stdout-path = "serial0:115200n8";[all …]
1 // SPDX-License-Identifier: GPL-2.03 * r8a7790 Clock Pulse Generator / Module Standby and Software Reset7 * Based on clk-rcar-gen2.c15 #include <linux/soc/renesas/rcar-rst.h>17 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>19 #include "renesas-cpg-mssr.h"20 #include "rcar-gen2-cpg.h"101 DEF_MOD("2d-dmac", 115, R8A7790_CLK_ZS),102 DEF_MOD("fdp1-2", 117, R8A7790_CLK_ZS),103 DEF_MOD("fdp1-1", 118, R8A7790_CLK_ZS),[all …]
2 * sh_eth.h - Driver for Renesas SuperH ethernet controller.4 * Copyright (C) 2008 - 2012 Renesas Solutions Corp.5 * Copyright (c) 2008 - 2012 Nobuhiro Iwamatsu8 * SPDX-License-Identifier: GPL-2.0+18 use area P2 (non-cacheable) */53 #define TX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12)68 #define RX_DESC_PADDING (CONFIG_SH_ETHER_ALIGNE_SIZE - 12)102 /* E-DMAC registers */131 /* Ether registers */165 RMIIMR, /* R8A7790 */[all …]
1 // SPDX-License-Identifier: GPL-2.05 * Copyright (C) 2006-2012 Nobuhiro Iwamatsu6 * Copyright (C) 2008-2014 Renesas Solutions Corp.7 * Copyright (C) 2013-2017 Cogent Embedded, Inc.15 #include <linux/dma-mapping.h>19 #include <linux/mdio-bitbang.h>46 [0 ... SH_ETH_MAX_REGISTER_OFFSET - 1] = SH_ETH_OFFSET_INVALID55 __diag_ignore(GCC, 8, "-Woverride-init",352 u16 offset = mdp->reg_offset[enum_index]; in sh_eth_write()357 iowrite32(data, mdp->addr + offset); in sh_eth_write()[all …]
1 // SPDX-License-Identifier: GPL-2.04 * Copyright (C) 2014-2019 Renesas Electronics Corporation6 * Copyright (C) 2015-2016 Cogent Embedded, Inc. <source@cogentembedded.com>14 #include <linux/dma-mapping.h>68 return -ETIMEDOUT; in ravb_wait()89 switch (priv->speed) { in ravb_set_rate()101 u32 reserve = (unsigned long)skb->data & (RAVB_ALIGN - 1); in ravb_set_buffer_align()104 skb_reserve(skb, RAVB_ALIGN - reserve); in ravb_set_buffer_align()115 ether_addr_copy(ndev->dev_addr, mac); in ravb_read_mac_address()120 ndev->dev_addr[0] = (mahr >> 24) & 0xFF; in ravb_read_mac_address()[all …]
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