| /rk3399_rockchip-uboot/doc/ |
| H A D | README.scrapyard | 20 da830evm arm arm926ejs d7e8b2b9 2015-09-12 Nick Thompson <nick.thompson@ge… 21 wireless_space arm arm926ejs b352182a 2015-09-12 Albert ARIBAUD <albert.u.boot@a… 31 balloon3 arm pxa 679d4456 2015-08-30 Marek Vasut <marex@denx.de> 32 cpu9260_128M arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com> 33 cpu9260 arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com> 34 cpu9260_nand_128M arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com> 35 cpu9260_nand arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com> 36 cpu9G20_128M arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com> 37 cpu9G20 arm arm926ejs af7f884b 2015-08-30 Eric Benard <eric@eukrea.com> 38 cpuat91 arm arm920t af7f884b 2015-08-30 Eric Benard <eric@eukrea.com> [all …]
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| H A D | README.clang | 7 Since version 3.4 the ARM backend can be instructed to leave r9 alone. 12 NOTE: target compilation only work for _some_ ARM boards at the moment. 17 in the ARM world, since crt0.S takes care of this. These assignments 20 NOTE: without the -mllvm -arm-use-movt=0 flags U-Boot will compile 32 make HOSTCC=clang CROSS_COMPILE=arm-linux-gnueabi- CC=clang -j8 41 incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils 44 ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as 48 export CROSS_COMPILE=arm-gnueabi-freebsd- 50 gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd" -j8 55 /usr/local/bin/arm-gnueabi-freebsd-gcc [all …]
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | thunderx-88xx.dtsi | 17 compatible = "arm,psci-0.2"; 27 compatible = "cavium,thunder", "arm,armv8"; 33 compatible = "cavium,thunder", "arm,armv8"; 39 compatible = "cavium,thunder", "arm,armv8"; 45 compatible = "cavium,thunder", "arm,armv8"; 51 compatible = "cavium,thunder", "arm,armv8"; 57 compatible = "cavium,thunder", "arm,armv8"; 63 compatible = "cavium,thunder", "arm,armv8"; 69 compatible = "cavium,thunder", "arm,armv8"; 75 compatible = "cavium,thunder", "arm,armv8"; [all …]
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| H A D | hi6220.dtsi | 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 compatible = "arm,psci-0.2"; 57 compatible = "arm,cortex-a53", "arm,armv8"; 64 compatible = "arm,cortex-a53", "arm,armv8"; 71 compatible = "arm,cortex-a53", "arm,armv8"; 78 compatible = "arm,cortex-a53", "arm,armv8"; 85 compatible = "arm,cortex-a53", "arm,armv8"; 92 compatible = "arm,cortex-a53", "arm,armv8"; 99 compatible = "arm,cortex-a53", "arm,armv8"; 106 compatible = "arm,cortex-a53", "arm,armv8"; [all …]
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| H A D | hi3798cv200.dtsi | 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 compatible = "arm,psci-0.2"; 30 compatible = "arm,cortex-a53"; 37 compatible = "arm,cortex-a53"; 44 compatible = "arm,cortex-a53"; 51 compatible = "arm,cortex-a53"; 59 compatible = "arm,gic-400"; 68 compatible = "arm,armv8-timer"; 110 compatible = "arm,pl011", "arm,primecell"; 119 compatible = "arm,pl011", "arm,primecell"; [all …]
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| H A D | sun50i-h5.dtsi | 2 * Copyright (c) 2016 ARM Ltd. 48 compatible = "arm,cortex-a53", "arm,armv8"; 52 compatible = "arm,cortex-a53", "arm,armv8"; 56 compatible = "arm,cortex-a53", "arm,armv8"; 60 compatible = "arm,cortex-a53", "arm,armv8"; 66 compatible = "arm,psci-0.2"; 71 compatible = "arm,armv8-timer"; 76 compatible = "arm,gic-400";
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| H A D | armada-ap806-quad.dtsi | 59 compatible = "arm,cortex-a72", "arm,armv8"; 65 compatible = "arm,cortex-a72", "arm,armv8"; 71 compatible = "arm,cortex-a72", "arm,armv8"; 77 compatible = "arm,cortex-a72", "arm,armv8";
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| H A D | bcm2836.dtsi | 19 arm-pmu { 20 compatible = "arm,cortex-a7-pmu"; 27 compatible = "arm,armv7-timer"; 42 compatible = "arm,cortex-a7"; 49 compatible = "arm,cortex-a7"; 56 compatible = "arm,cortex-a7"; 63 compatible = "arm,cortex-a7";
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| H A D | armada-ap806.dtsi | 47 #include <dt-bindings/interrupt-controller/arm-gic.h> 63 compatible = "arm,psci-0.2"; 81 compatible = "arm,gic-400"; 94 compatible = "arm,gic-v2m-frame"; 97 arm,msi-base-spi = <160>; 98 arm,msi-num-spis = <32>; 101 compatible = "arm,gic-v2m-frame"; 104 arm,msi-base-spi = <192>; 105 arm,msi-num-spis = <32>; 108 compatible = "arm,gic-v2m-frame"; [all …]
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| H A D | sun8i-a83t.dtsi | 48 #include <dt-bindings/interrupt-controller/arm-gic.h> 60 compatible = "arm,cortex-a7"; 66 compatible = "arm,cortex-a7"; 72 compatible = "arm,cortex-a7"; 78 compatible = "arm,cortex-a7"; 84 compatible = "arm,cortex-a7"; 90 compatible = "arm,cortex-a7"; 96 compatible = "arm,cortex-a7"; 102 compatible = "arm,cortex-a7"; 109 compatible = "arm,armv7-timer"; [all …]
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| /rk3399_rockchip-uboot/ |
| H A D | MAINTAINERS | 62 ARM 65 T: git git://git.denx.de/u-boot-arm.git 66 F: arch/arm/ 68 ARM ALTERA SOCFPGA 72 F: arch/arm/mach-socfpga/ 74 ARM ATMEL AT91 78 F: arch/arm/mach-at91/ 80 ARM BROADCOM BCM283X 83 F: arch/arm/mach-bcm283x/ 90 ARM BROADCOM BCMSTB [all …]
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| /rk3399_rockchip-uboot/arch/arm/ |
| H A D | Kconfig | 1 menu "ARM architecture" 2 depends on ARM 5 default "arm" 47 # If set, the workarounds for these ARM errata are applied early during U-Boot 219 bool "Support for ARM SMC Calling Convention (SMCCC)" 223 Say Y here if you want to enable ARM SMC Calling Convention. 228 bool "Support for ARM cpu suspend and resume" 231 Say Y here if you want to enable ARM cpu suspend/resume which allows 246 ARM architectures. Thumb instruction set provides better code 247 density. For ARM architectures that support Thumb2 this flag will [all …]
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| H A D | Makefile | 80 machdirs := $(patsubst %,arch/arm/mach-%/,$(machine-y)) 86 head-y := arch/arm/cpu/$(CPU)/start.o 94 libs-y += arch/arm/cpu/$(CPU)/ 95 libs-y += arch/arm/cpu/ 96 libs-y += arch/arm/lib/ 100 libs-y += arch/arm/mach-imx/ 104 libs-y += arch/arm/mach-imx/ 109 libs-y += arch/arm/mach-mvebu/
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| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/ |
| H A D | Kconfig | 18 The Rockchip PX30 is a ARM-based SoC with a quad-core Cortex-A35 26 default "arch/arm/mach-rockchip/u-boot-tpl-v8.lds" 63 The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7 75 The Rockchip RK3128 is a ARM-based SoC with a quad-core Cortex-A7 107 The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9 127 The Rockchip RK3188 is a ARM-based SoC with a quad-core Cortex-A9 152 The Rockchip RK3229 is a ARM-based SoC with a dual-core Cortex-A7 196 The Rockchip RK3288 is a ARM-based SoC with a quad-core Cortex-A17 204 default "arch/arm/mach-rockchip/make_fit_optee.sh" 207 default "arch/arm/mach-rockchip/u-boot-tpl.lds" [all …]
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| /rk3399_rockchip-uboot/board/armltd/integrator/ |
| H A D | README | 2 U-Boot for ARM Integrator Development Platforms 4 Peter Pearse, ARM Ltd. 5 peter.pearse@arm.com 6 www.arm.com 9 http://www.arm.com/products/DevTools/Hardware_Platforms.html 15 Each CM consists of a ARM processor core and associated hardware e.g 26 a) Run ARM boot monitor, manually run U-Boot image from flash 27 b) Run ARM boot monitor, automatically run U-Boot image from flash 30 In cases a) and b) the ARM boot monitor will have configured the CM and mapped 49 Code specific to initialization of a particular ARM processor has been placed in [all …]
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| /rk3399_rockchip-uboot/drivers/cpu/ |
| H A D | amp.its | 13 /* ARM cortex-A core */ 19 arch = "arm"; // "arm64" or "arm", the same as U-Boot state 21 thumb = <0>; // 0: arm or thumb2; 1: thumb 35 arch = "arm"; 51 arch = "arm"; 68 arch = "arm"; // "arm64" or "arm", the same as U-Boot state
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| /rk3399_rockchip-uboot/arch/arm/mach-omap2/ |
| H A D | Kconfig | 80 ARM core and more. 89 ARM core and more. 108 ARM core, a quad core PRU-ICSS for industrial Ethernet 124 ARM core, a dual core PRU-ICSS for industrial Ethernet 172 source "arch/arm/mach-omap2/omap3/Kconfig" 174 source "arch/arm/mach-omap2/omap4/Kconfig" 176 source "arch/arm/mach-omap2/omap5/Kconfig" 178 source "arch/arm/mach-omap2/am33xx/Kconfig" 193 default "arch/arm/mach-omap2/u-boot-spl.lds"
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| H A D | README.soc | 12 The LS1043A integrated multicore processor combines four ARM Cortex-A53 18 - Four 64-bit ARM Cortex-A53 CPUs 50 The LS2080A integrated multicore processor combines eight ARM Cortex-A57 57 - Eight 64-bit ARM Cortex-A57 CPUs 94 The LS1012A features an advanced 64-bit ARM v8 Cortex- 100 - One 64-bit ARM v8 Cortex-A53 core with the following capabilities: 101 - ARM v8 cryptography extensions 104 - ARM core-link CCI-400 cache coherent interconnect 131 - ARM generic timer 136 The LS1046A integrated multicore processor combines four ARM Cortex-A72 [all …]
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| /rk3399_rockchip-uboot/drivers/firmware/ |
| H A D | psci.c | 5 * Copyright (C) 2015 ARM Limited 14 #include <linux/arm-smccc.h> 43 if (device_is_compatible(dev, "arm,psci-0.2") || in psci_bind() 44 device_is_compatible(dev, "arm,psci-1.0")) { in psci_bind() 80 { .compatible = "arm,psci" }, 81 { .compatible = "arm,psci-0.2" }, 82 { .compatible = "arm,psci-1.0" },
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| /rk3399_rockchip-uboot/arch/arm/mach-rmobile/ |
| H A D | Kconfig | 8 bool "Renesas ARM SoCs R-Car Gen1/Gen2 (32bit)" 12 bool "Renesas ARM SoCs R-Car Gen3 (64bit)" 17 source "arch/arm/mach-rmobile/Kconfig.32" 18 source "arch/arm/mach-rmobile/Kconfig.64"
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| /rk3399_rockchip-uboot/doc/uImage.FIT/ |
| H A D | overlay-fdt-boot.txt | 30 arch = "arm"; 38 arch = "arm"; 43 arch = "arm"; 48 arch = "arm"; 53 arch = "arm"; 58 arch = "arm"; 63 arch = "arm"; 123 arch = "arm"; 131 arch = "arm"; 137 arch = "arm"; [all …]
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/serial/ |
| H A D | pl01x.txt | 1 * ARM AMBA Primecell PL011 & PL010 serial UART 4 - compatible: must be "arm,primecell", "arm,pl011" or "arm,pl010"
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| /rk3399_rockchip-uboot/board/engicam/isiotmx6ul/ |
| H A D | MAINTAINERS | 9 F: arch/arm/dts/imx6ul-isiot.dtsi 10 F: arch/arm/dts/imx6ul-isiot-mmc.dts 11 F: arch/arm/dts/imx6ul-isiot-emmc.dts 12 F: arch/arm/dts/imx6ul-isiot-nand.dts
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/ |
| H A D | cache_v7_asm.S | 11 #define ARM(x...) macro 14 #define ARM(x...) x macro 25 * Note: copied from arch/arm/mm/cache-v7.S of Linux 4.4 54 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11 57 ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11 81 ARM( stmfd sp!, {r4-r5, r7, r9-r11, lr} ) 84 ARM( ldmfd sp!, {r4-r5, r7, r9-r11, lr} ) 127 ARM( orr r11, r10, r4, lsl r5 ) @ factor way and cache number into r11 130 ARM( orr r11, r11, r9, lsl r2 ) @ factor index number into r11 151 ARM( stmfd sp!, {r4-r5, r7, r9-r11, lr} ) [all …]
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| /rk3399_rockchip-uboot/include/configs/ |
| H A D | integrator-common.h | 5 * Common ARM Integrator configuration settings 37 * e.g. ARM Boot Monitor or pre-loader is repeated once 41 * will either reboot into the ARM monitor (or pre-loader) 54 * The ARM boot monitor initializes the board. 59 * e.g. whether the ARM Boot Monitor runs before U-Boot 64 * The ARM boot monitor does not relocate U-Boot. 88 * - ARM Boot Monitor
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