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/OK3568_Linux_fs/kernel/arch/arm64/
H A DKconfig.platforms1 # SPDX-License-Identifier: GPL-2.0-only
9 This enables support for the Actions Semiconductor S900 SoC family.
12 bool "Intel's Agilex SoCFPGA Family"
14 This enables support for Intel's Agilex SoCFPGA Family.
17 bool "Allwinner sunxi 64-bit SoC Family"
30 Soc family.
43 This enables support for the Broadcom BCM2837 and BCM2711 SoC.
47 bool "Broadcom iProc SoC Family"
55 bool "Marvell Berlin SoC Family"
61 This enables support for Marvell Berlin SoC Family
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/OK3568_Linux_fs/kernel/drivers/pcmcia/
H A Dsa1111_generic.c1 // SPDX-License-Identifier: GPL-2.0-only
22 #include <asm/mach-types.h>
71 struct sa1111_pcmcia_socket *s = to_skt(skt); in sa1111_pcmcia_socket_state() local
72 u32 status = readl_relaxed(s->dev->mapbase + PCSR); in sa1111_pcmcia_socket_state()
74 switch (skt->nr) { in sa1111_pcmcia_socket_state()
76 state->detect = status & PCSR_S0_DETECT ? 0 : 1; in sa1111_pcmcia_socket_state()
77 state->ready = status & PCSR_S0_READY ? 1 : 0; in sa1111_pcmcia_socket_state()
78 state->bvd1 = status & PCSR_S0_BVD1 ? 1 : 0; in sa1111_pcmcia_socket_state()
79 state->bvd2 = status & PCSR_S0_BVD2 ? 1 : 0; in sa1111_pcmcia_socket_state()
80 state->wrprot = status & PCSR_S0_WP ? 1 : 0; in sa1111_pcmcia_socket_state()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dqts-filter.sh8 sed -n ':next;s/\r$//;/[^\\]\\$/ {N;s/\\\n//;b next};p' $1
13 # $1: SoC type
19 soc="$1"
29 * SPDX-License-Identifier: BSD-3-Clause
39 ${in_bsp_dir}/generated/iocsr_config_${soc}.h |
40 grep 'CONFIG_HPS_IOCSR_SCANCHAIN[0-9]\+_LENGTH' | tr -d "()"
44 # Retrieve the scan chain config and zap the ad-hoc length encoding
46 ${in_bsp_dir}/generated/iocsr_config_${soc}.c |
47 sed -n '/^const/ !b; :next {/^const/ s/(.*)//;p;n;b next}'
58 # $1: SoC type
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/OK3568_Linux_fs/kernel/Documentation/ABI/testing/
H A Dsysfs-devices-soc5 The /sys/devices/ directory contains a sub-directory for each
6 System-on-Chip (SoC) device on a running platform. Information
7 regarding each SoC can be obtained by reading sysfs files. This
10 The directory created for each SoC will also house information
12 It has been agreed that if an SoC device exists, its supported
13 devices would be better suited to appear as children of that SoC.
19 Read-only attribute common to all SoCs. Contains the SoC machine
26 Read-only attribute common to all SoCs. Contains SoC family name
30 this will contain the JEDEC JEP106 manufacturer’s identification
34 This manufacturer’s identification code is defined by one
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/OK3568_Linux_fs/kernel/drivers/memory/tegra/
H A Dmc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
18 #include <soc/tegra/fuse.h>
24 { .compatible = "nvidia,tegra20-mc-gart", .data = &tegra20_mc_soc },
27 { .compatible = "nvidia,tegra30-mc", .data = &tegra30_mc_soc },
30 { .compatible = "nvidia,tegra114-mc", .data = &tegra114_mc_soc },
33 { .compatible = "nvidia,tegra124-mc", .data = &tegra124_mc_soc },
36 { .compatible = "nvidia,tegra132-mc", .data = &tegra132_mc_soc },
39 { .compatible = "nvidia,tegra210-mc", .data = &tegra210_mc_soc },
51 spin_lock_irqsave(&mc->lock, flags); in tegra_mc_block_dma_common()
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/OK3568_Linux_fs/kernel/drivers/pinctrl/freescale/
H A Dpinctrl-mxs.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include "pinctrl-mxs.h"
25 struct mxs_pinctrl_soc_data *soc; member
32 return d->soc->ngroups; in mxs_get_groups_count()
40 return d->soc->groups[group].name; in mxs_get_group_name()
48 *pins = d->soc->groups[group].pins; in mxs_get_group_pins()
49 *num_pins = d->soc->groups[group].npins; in mxs_get_group_pins()
54 static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, in mxs_pin_dbg_show() argument
57 seq_printf(s, " %s", dev_name(pctldev->dev)); in mxs_pin_dbg_show()
69 int length = strlen(np->name) + SUFFIX_LEN; in mxs_dt_node_to_map()
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/OK3568_Linux_fs/kernel/drivers/phy/tegra/
H A Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
20 #include <soc/tegra/fuse.h>
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
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/OK3568_Linux_fs/buildroot/package/rockchip/
H A DConfig.in23 prompt "Rockchip SoC"
29 Use rockchip's px30 chip
34 Use rockchip's rk3036 chip
40 Use rockchip's rk312x chip
46 Use rockchip's rk3288 chip
51 Use rockchip's rk3308 chip
57 Use rockchip's rk3326 chip
63 Use rockchip's rk3358 chip
69 Use Rockchip's rk3399 SoC
75 Use Rockchip's rk3399pro SoC
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/OK3568_Linux_fs/kernel/drivers/pinctrl/nomadik/
H A Dpinctrl-abx500.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2013
28 #include <linux/pinctrl/pinconf-generic.h>
31 #include "pinctrl-abx500.h"
34 #include "../pinctrl-utils.h"
82 struct abx500_pinctrl_soc_data *soc; member
98 ret = abx500_get_register_interruptible(pct->dev, in abx500_gpio_get_bit()
101 dev_err(pct->dev, in abx500_gpio_get_bit()
102 "%s read reg =%x, offset=%x failed (%d)\n", in abx500_gpio_get_bit()
120 ret = abx500_mask_and_set_register_interruptible(pct->dev, in abx500_gpio_set_bits()
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/OK3568_Linux_fs/u-boot/drivers/power/
H A Dcharge_animation.c4 * SPDX-License-Identifier: GPL-2.0+
29 #include <irq-generic.h>
37 #define IMAGE_RECALC_IDX -1
38 #define IMAGE_SOC_100_IDX(n) ((n) - 2)
39 #define IMAGE_LOWPOWER_IDX(n) ((n) - 1)
48 int soc; member
73 * 2. You must set the failed image as last one and soc = -1 !!!
76 { .name = "battery_0.bmp", .soc = 5, .period = 600 },
77 { .name = "battery_1.bmp", .soc = 20, .period = 600 },
78 { .name = "battery_2.bmp", .soc = 40, .period = 600 },
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/OK3568_Linux_fs/kernel/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 #include "pinctrl-mvebu.h"
64 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; in mvebu_mmio_mpp_ctrl_get()
76 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); in mvebu_mmio_mpp_ctrl_set()
77 writel(reg | (config << shift), data->base + off); in mvebu_mmio_mpp_ctrl_set()
86 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
87 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
88 pid < pctl->groups[n].pins[0] + in mvebu_pinctrl_find_group_by_pid()
89 pctl->groups[n].npins) in mvebu_pinctrl_find_group_by_pid()
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/OK3568_Linux_fs/kernel/drivers/bus/
H A Dmvebu-mbus.c14 * - One to configure the access of the CPU to the devices. Depending
20 * - One to configure the access to the CPU to the SDRAM. There are
26 * - Reads out the SDRAM address decoding windows at initialization
33 * devices have to configure those device -> SDRAM windows to ensure
36 * - Provides an API for platform code or device drivers to
37 * dynamically add or remove address decoding windows for the CPU ->
42 * - Provides a debugfs interface in /sys/kernel/debug/mvebu-mbus/ to
43 * see the list of CPU -> SDRAM windows and their configuration
44 * (file 'sdram') and the list of CPU -> devices windows and their
118 void (*setup_cpu_target)(struct mvebu_mbus_state *s);
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/OK3568_Linux_fs/kernel/sound/soc/fsl/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "SoC Audio for Freescale CPUs"
4 comment "Common SoC Audio options for Freescale CPUs:"
14 This option is only useful for out-of-tree drivers since
15 in-tree drivers select it automatically.
25 This option is only useful for out-of-tree drivers since
26 in-tree drivers select it automatically.
35 This option is only useful for out-of-tree drivers since
36 in-tree drivers select it automatically.
53 This option is only useful for out-of-tree drivers since
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/OK3568_Linux_fs/kernel/drivers/pinctrl/tegra/
H A Dpinctrl-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
10 * Copyright (C) 2009-2011 ST-Ericsson AB
25 #include "../pinctrl-utils.h"
26 #include "pinctrl-tegra.h"
30 return readl(pmx->regs[bank] + reg); in pmx_readl()
35 writel_relaxed(val, pmx->regs[bank] + reg); in pmx_writel()
44 return pmx->soc->ngroups; in tegra_pinctrl_get_groups_count()
52 return pmx->soc->groups[group].name; in tegra_pinctrl_get_group_name()
62 *pins = pmx->soc->groups[group].pins; in tegra_pinctrl_get_group_pins()
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/OK3568_Linux_fs/kernel/drivers/iommu/
H A Dtegra-smmu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2014 NVIDIA CORPORATION. All rights reserved.
16 #include <linux/dma-mapping.h>
18 #include <soc/tegra/ahb.h>
19 #include <soc/tegra/mc.h>
24 const struct tegra_smmu_group_soc *soc; member
34 const struct tegra_smmu_soc *soc; member
72 writel(value, smmu->regs + offset); in smmu_writel()
77 return readl(smmu->regs + offset); in smmu_readl()
87 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask)
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/OK3568_Linux_fs/kernel/drivers/pinctrl/qcom/
H A Dpinctrl-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/pinctrl/pinconf-generic.h>
27 #include <linux/soc/qcom/irq.h>
31 #include "pinctrl-msm.h"
32 #include "../pinctrl-utils.h"
39 * struct msm_pinctrl - state for a pinctrl-msm device
55 * @soc: Reference to soc_data of platform specific data.
78 const struct msm_pinctrl_soc_data *soc; member
87 return readl(pctrl->regs[g->tile] + g->name##_reg); \
92 writel(val, pctrl->regs[g->tile] + g->name##_reg); \
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/OK3568_Linux_fs/kernel/drivers/phy/samsung/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 tristate "Exynos SoC series Display Port PHY driver"
15 tristate "S5P/Exynos SoC series MIPI CSI-2/DSI PHY driver"
21 Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
29 Enable PCIe PHY support for Exynos SoC series.
33 tristate "SAMSUNG SoC series UFS PHY driver"
51 for particular PHYs will be enabled based on the SoC type in addition
76 particular SoC is compiled in the driver. In case of S5PV210 two phys
77 are available - device and host.
80 tristate "Exynos5 SoC series USB DRD PHY driver"
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/OK3568_Linux_fs/kernel/drivers/soc/fsl/
H A Dguts.c1 // SPDX-License-Identifier: GPL-2.0-or-later
33 /* SoC die attribute definition for QorIQ platform */
36 * Power Architecture-based SoCs T Series
39 /* Die: T4240, SoC: T4240/T4160/T4080 */
44 /* Die: T1040, SoC: T1040/T1020/T1042/T1022 */
49 /* Die: T2080, SoC: T2080/T2081 */
54 /* Die: T1024, SoC: T1024/T1014/T1023/T1013 */
61 * ARM-based SoCs LS Series
64 /* Die: LS1043A, SoC: LS1043A/LS1023A */
69 /* Die: LS2080A, SoC: LS2080A/LS2040A/LS2085A */
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/OK3568_Linux_fs/kernel/drivers/thermal/tegra/
H A Dsoctherm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2014 - 2018, NVIDIA CORPORATION. All rights reserved.
34 #include <dt-bindings/thermal/tegra124-soctherm.h>
197 #define REG_GET_MASK(r, m) (((r) & (m)) >> (ffs(m) - 1))
200 (((v) & (m >> (ffs(m) - 1))) << (ffs(m) - 1)))
203 #define THROT_DEPTH_DIVIDEND(depth) ((256 * (100 - (depth)) / 100) - 1)
205 /* gk20a nv_therm interface N:3 Mapping. Levels defined in tegra124-soctherm.h
212 #define THROT_LEVEL_TO_DEPTH(level) ((0x1 << (level)) - 1)
229 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
232 (ALARM_OFFSET * (throt - THROTTLE_OC1)))
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/OK3568_Linux_fs/kernel/arch/arm/mach-at91/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 bool "SAM Cortex-M7 family" if ARM_SINGLE_ARMV7M
17 Select this if you are using an SoC from Microchip's SAME7, SAMS7 or SAMV7
33 Select this if ou are using one of Microchip's SAMA5D2 family SoC.
44 Select this if you are using one of Microchip's SAMA5D3 family SoC.
58 Select this if you are using one of Microchip's SAMA5D4 family SoC.
72 Select this if you are using Microchip's AT91RM9200 SoC.
90 Select this if you are using one of those Microchip SoC:
123 Select this if you are using Microchip's SAM9X60 SoC
144 On platforms with 16-bit counters, two timer channels are combined
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/OK3568_Linux_fs/u-boot/arch/mips/mach-bmips/
H A DKconfig13 prompt "Broadcom MIPS SoC select"
88 bool "Comtrend AR-5387un"
92 Comtrend AR-5387un boards have a BCM6328 SoC with 64 MB of RAM and 16
94 Between its different peripherals there's an integrated switch with 4
99 bool "Comtrend CT-5361"
103 Comtrend CT-5361 boards have a BCM6348 SoC with 16 MB of RAM and 4 MB
105 Between its different peripherals there's a BCM5325 switch with 4
110 bool "Comtrend VR-3032u board"
114 Comtrend VR-3032u boards have a BCM63268 SoC with 64 MB of RAM and
116 Between its different peripherals there's an integrated switch with 4
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/OK3568_Linux_fs/u-boot/arch/mips/mach-ath79/
H A Dcpu.c2 * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
4 * SPDX-License-Identifier: GPL-2.0+
15 const enum ath79_soc_type soc; member
52 enum ath79_soc_type soc = ATH79_SOC_UNKNOWN; in mach_cpu_init() local
92 soc = desc[i].soc; in mach_cpu_init()
97 gd->arch.id = id; in mach_cpu_init()
98 gd->arch.soc = soc; in mach_cpu_init()
99 gd->arch.rev = rev; in mach_cpu_init()
100 gd->arch.ver = ver; in mach_cpu_init()
106 enum ath79_soc_type soc = ATH79_SOC_UNKNOWN; in print_cpuinfo() local
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/OK3568_Linux_fs/kernel/drivers/clk/tegra/
H A Dclk-dfll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * clk-dfll.c - Tegra DFLL clock source common code
5 * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved.
11 * SoC. These IP blocks together are also known at NVIDIA as
12 * "CL-DVFS". To try to avoid confusion, this code refers to them
18 * DFLL can be operated in either open-loop mode or closed-loop mode.
19 * In open-loop mode, the DFLL generates an output clock appropriate
20 * to the supply voltage. In closed-loop mode, when configured with a
25 * variation. In the case of the CPU, it's important to note that the
27 * performance-measurement code and any code that relies on the CPU
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/OK3568_Linux_fs/kernel/drivers/net/mdio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 loadable module or built-in.
40 interface units of the Allwinner SoC that have an EMAC (A10,
44 tristate "APM X-Gene SoC MDIO bus controller"
48 APM X-Gene SoC's.
56 controllers found in the ASPEED AST2600 SoC. This is a driver for the
57 third revision of the ASPEED MDIO register interface - the first two
79 Broadcom iProc SoC's.
94 tristate "GPIO lib-based bitbanged MDIO buses"
98 Supports GPIO lib-based MDIO busses.
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/OK3568_Linux_fs/kernel/drivers/soc/ti/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 # 64-bit ARM SoCs from TI
8 bool "K3 AM6 SoC"
10 Enable support for TI's AM6 SoC Family support
13 bool "K3 J721E SoC"
15 Enable support for TI's J721E SoC Family support
22 # TI SOC drivers
25 bool "TI SOC drivers support"
36 Packets are queued/de-queued by writing/reading descriptor address
58 c-states on AM335x. Also required for rtc and ddr in self-refresh low
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