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/OK3568_Linux_fs/buildroot/package/openocd/
H A DConfig.in35 bool "ST-Link JTAG Programmer"
40 Enable building support for the ST-Link JTAG
44 bool "TI ICDI JTAG Programmer"
49 Enable building support for the TI ICDI JTAG
53 bool "Keil ULINK JTAG Programmer"
58 Enable building support for the Keil ULINK JTAG
71 bool "Segger J-Link JTAG Programmer"
76 Segger J-Link JTAG Programmer and clone such as Atmel
80 bool "OSDBM JTAG (only) Programmer"
85 Enable building support for the OSBDM (JTAG only)
[all …]
/OK3568_Linux_fs/kernel/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-jtag.c36 #include <asm/octeon/cvmx-helper-jtag.h>
40 * Initialize the internal QLM JTAG logic to allow programming
41 * of the JTAG chain by the cvmx_helper_qlm_jtag_*() functions.
43 * Networks. Programming incorrect values into the JTAG chain
59 * Clock divider for QLM JTAG operations. eclk is divided by in cvmx_helper_qlm_jtag_init()
74 * Write up to 32bits into the QLM jtag chain. Bits are shifted
76 * order bits followed by the high order bits. The JTAG chain is
84 * Returns The low order bits of the JTAG chain that shifted out of the
104 * Shift long sequences of zeros into the QLM JTAG chain. It is
125 * Program the QLM JTAG chain into all lanes of the QLM. You must
[all …]
/OK3568_Linux_fs/kernel/drivers/soc/rockchip/
H A Dgrf.c125 * Postponing auto jtag/sdmmc switching by 5 seconds.
128 { "jtag switching delay", PX30_GRF_SOC_CON5, 0x7270E00},
140 * Disable auto jtag/sdmmc switching that causes issues with the
143 { "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
154 { "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
165 { "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
177 { "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
189 { "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
213 { "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
224 { "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-socfpga/
H A Dscan_manager.c41 * scan_chain_engine_is_idle() - Check if the JTAG scan chain is idle
69 * scan_mgr_jtag_io() - Access the JTAG chain
70 * @flags: Control flags, used to configure the action on the JTAG
74 * Perform I/O on the JTAG chain
80 if (flags & JTAG_BP_INSN) { /* JTAG instruction */ in scan_mgr_jtag_io()
82 * The SCC JTAG register is LSB first, so make in scan_mgr_jtag_io()
108 * scan_mgr_jtag_insn_data() - Send JTAG instruction and data
213 * scan_mgr_get_fpga_id() - Obtain FPGA JTAG ID
215 * This function obtains JTAG ID from the FPGA TAP controller.
223 /* Enable HPS to talk to JTAG in the FPGA through the System Manager */ in scan_mgr_get_fpga_id()
[all …]
/OK3568_Linux_fs/u-boot/doc/
H A DREADME.ramboot-ppc85xx15 1. Load the RAM based bootloader onto DDR via JTAG/BDI interface. And then
45 - In case of the pure RAM based bootloaders we have to do it by JTAG manually or already existing b…
48 1. Using JTAG
49 Boot up in core hold off mode or stop the core after reset using JTAG
51 Preconfigure DDR/L2SRAM through JTAG interface.
102 For JTAG RAMBOOT this is not required because CCSRBAR is at ff700000.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Dlantiq,pinctrl-xway.txt50 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
57 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu
61 exin0, exin1, exin2, exin3, exin4, jtag, ebu a23, ebu a24, ebu a25,
69 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, mdio, gphy
73 exin0, exin1, exin2, jtag, spi_di, spi_do, spi_clk, spi_cs1, spi_cs2,
78 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe
82 exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1,
89 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, dfe
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dam335x-draco.dts57 0x1d0 (PIN_INPUT | MUX_MODE0) /* tms jtag */
58 0x1d4 (PIN_INPUT | MUX_MODE0) /* tdi jtag */
59 0x1d8 (PIN_OUTPUT | MUX_MODE0) /* tdo jtag */
60 0x1dc (PIN_INPUT | MUX_MODE0) /* tck jtag */
61 0x1e0 (PIN_INPUT | MUX_MODE0) /* trstn jtag */
/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/b43/
H A Dphy_lp.h618 #define B2063_PLL_JTAG_CALNRST B43_LP_RADIO(0x064) /* PLL JTAG CALNRST */
619 #define B2063_PLL_JTAG_IN_PLL1 B43_LP_RADIO(0x065) /* PLL JTAG IN PLL 1 */
620 #define B2063_PLL_JTAG_IN_PLL2 B43_LP_RADIO(0x066) /* PLL JTAG IN PLL 2 */
621 #define B2063_PLL_JTAG_PLL_CP1 B43_LP_RADIO(0x067) /* PLL JTAG PLL CP 1 */
622 #define B2063_PLL_JTAG_PLL_CP2 B43_LP_RADIO(0x068) /* PLL JTAG PLL CP 2 */
623 #define B2063_PLL_JTAG_PLL_CP3 B43_LP_RADIO(0x069) /* PLL JTAG PLL CP 3 */
624 #define B2063_PLL_JTAG_PLL_CP4 B43_LP_RADIO(0x06A) /* PLL JTAG PLL CP 4 */
625 #define B2063_PLL_JTAG_PLL_CTL1 B43_LP_RADIO(0x06B) /* PLL JTAG PLL Control 1 */
626 #define B2063_PLL_JTAG_PLL_LF1 B43_LP_RADIO(0x06C) /* PLL JTAG PLL LF 1 */
627 #define B2063_PLL_JTAG_PLL_LF2 B43_LP_RADIO(0x06D) /* PLL JTAG PLL LF 2 */
[all …]
/OK3568_Linux_fs/buildroot/board/beaglebone/patches/linux/
H A D0001-keep-jtag-clock-alive-for-debugger.patch1 This patch keeps the debugSS clock alive, it clocks the JTAG macro and enables
2 access to the SoC via JTAG after the kernel booted.
13 + .flags = (HWMOD_INIT_NO_IDLE|HWMOD_INIT_NO_RESET), /* keep debugSS clock alive for JTAG */
/OK3568_Linux_fs/kernel/arch/mips/ralink/
H A Dmt7620.c152 FUNC("jtag", 3, 22, 8),
194 FUNC("jtag", 3, 30, 1),
201 FUNC("jtag", 3, 31, 1),
208 FUNC("jtag", 3, 32, 1),
215 FUNC("jtag", 3, 33, 1),
222 FUNC("jtag", 3, 34, 1),
236 FUNC("jtag", 3, 39, 1),
243 FUNC("jtag", 3, 40, 1),
250 FUNC("jtag", 3, 41, 1),
257 FUNC("jtag", 3, 42, 1),
[all …]
H A Drt305x.c35 static struct rt2880_pmx_func jtag_func[] = { FUNC("jtag", 0, 17, 5) };
61 GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
74 GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
90 GRP("jtag", jtag_func, 1, RT305X_GPIO_MODE_JTAG),
/OK3568_Linux_fs/kernel/drivers/tty/hvc/
H A DKconfig81 bool "ARM JTAG DCC console"
86 This console uses the JTAG DCC on ARM to create a console under the HVC
87 driver. This console is used through a JTAG only on ARM. If you don't have
88 a JTAG then you probably don't want this option.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Drenesas,r9a06g032-sysctrl.txt12 - external (optional) jtag input
15 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
30 clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
/OK3568_Linux_fs/kernel/arch/arm/mach-davinci/include/mach/
H A Dcputype.h22 u8 variant; /* JTAG ID bits 31:28 */
23 u16 part_no; /* JTAG ID bits 27:12 */
24 u16 manufacturer; /* JTAG ID bits 11:1 */
/OK3568_Linux_fs/kernel/arch/sparc/include/asm/
H A Dfhc.h67 #define FHC_PREGS_JCTRL 0xf0UL /* FHC JTAG Control Register */
68 #define FHC_JTAG_CTRL_MENAB 0x80000000 /* Indicates this is JTAG Master */
69 #define FHC_JTAG_CTRL_MNONE 0x40000000 /* Indicates no JTAG Master present */
70 #define FHC_PREGS_JCMD 0x100UL /* FHC JTAG Command Register */
/OK3568_Linux_fs/u-boot/drivers/serial/
H A DKconfig134 bool "Altera JTAG UART"
212 Select this to enable a debug UART using the ARM JTAG DCC port.
356 bool "Altera JTAG UART support"
359 Select this to enable an JTAG UART for Altera devices.The JTAG UART
368 Bypass console output and keep going even if there is no JTAG
370 once the JTAG terminal is connected. Without the bypass, the console
371 output will wait forever until a JTAG terminal is connected. If you
/OK3568_Linux_fs/buildroot/board/csky/
H A Dreadme.txt14 * Integrate with hardware Jtag.
51 Prepare Jtag-Server
54 Download the Jtag-Server here:
/OK3568_Linux_fs/kernel/drivers/pinctrl/
H A Dpinctrl-xway.c131 MFP_XWAY(GPIO15, GPIO, SPI, JTAG, NONE),
132 MFP_XWAY(GPIO16, GPIO, SPI, NONE, JTAG),
133 MFP_XWAY(GPIO17, GPIO, SPI, NONE, JTAG),
134 MFP_XWAY(GPIO18, GPIO, SPI, NONE, JTAG),
136 MFP_XWAY(GPIO20, GPIO, JTAG, NONE, NONE),
242 GRP_MUX("jtag", JTAG, pins_jtag),
310 static const char * const xway_jtag_grps[] = {"jtag"};
336 {"jtag", ARRAY_AND_SIZE(xway_jtag_grps)},
359 MFP_XWAY(GPIO7, GPIO, SPI, MII, JTAG),
360 MFP_XWAY(GPIO8, GPIO, SPI, MII, JTAG),
[all …]
/OK3568_Linux_fs/kernel/drivers/tty/serial/
H A Daltera_jtaguart.c3 * altera_jtaguart.c -- Altera JTAG UART driver
29 * Altera JTAG UART register definitions according to the Altera JTAG UART
219 pr_err(DRV_NAME ": unable to attach Altera JTAG UART %d " in altera_jtaguart_startup()
254 return (port->type == PORT_ALTERA_JTAGUART) ? "Altera JTAG UART" : NULL; in altera_jtaguart_type()
522 MODULE_DESCRIPTION("Altera JTAG UART driver");
/OK3568_Linux_fs/u-boot/board/work-microwave/work_92105/
H A DREADME25 This file can be loaded in SRAM through a JTAG
30 DDR through a JTAG debugger (for instance by
36 SPL assumes (even when loaded through JTAG or
/OK3568_Linux_fs/buildroot/board/csky/gx6605s/
H A Dgdbinit1 tar jtag jtag://127.0.0.1:1025
/OK3568_Linux_fs/kernel/drivers/misc/altera-stapl/
H A Daltera-jtag.c3 * altera-jtag.c
17 #include "altera-jtag.h"
25 * This structure shows, for each JTAG state, which state is reached after
27 * describes all possible state transitions in the JTAG state machine.
79 /* initial JTAG state is unknown */ in altera_jinit()
294 /* initialize JTAG chain to known state */ in altera_goto_jstate()
367 * Causes JTAG hardware to sit in the specified stable in altera_wait_msecs()
369 * no JTAG operations have been performed yet, then only in altera_wait_msecs()
372 * any JTAG operations. in altera_wait_msecs()
986 /* If the JTAG interface was used, reset it to TLR */ in altera_free_buffers()
/OK3568_Linux_fs/u-boot/board/cadence/xtfpga/
H A DREADME17 - An on-chip-debug (OCD) JTAG interface.
64 Mapping to SRAM allows U-Boot to be debugged with an OCD/JTAG
105 OCD/JTAG. This limits the useful size of U-Boot to 128 KB (0x20000)
/OK3568_Linux_fs/kernel/drivers/pinctrl/sunxi/
H A Dpinctrl-sun8i-v3s.c84 SUNXI_FUNCTION(0x2, "jtag"), /* MS */
90 SUNXI_FUNCTION(0x2, "jtag"), /* CK */
96 SUNXI_FUNCTION(0x2, "jtag"), /* DO */
102 SUNXI_FUNCTION(0x2, "jtag"), /* DI */
432 SUNXI_FUNCTION(0x3, "jtag")), /* MS */
437 SUNXI_FUNCTION(0x3, "jtag")), /* DI */
447 SUNXI_FUNCTION(0x3, "jtag")), /* DO */
457 SUNXI_FUNCTION(0x3, "jtag")), /* CK */
H A Dpinctrl-sun8i-h3.c28 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
34 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
40 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
46 SUNXI_FUNCTION(0x3, "jtag"), /* DI */
388 SUNXI_FUNCTION(0x3, "jtag")), /* MS */
393 SUNXI_FUNCTION(0x3, "jtag")), /* DI */
403 SUNXI_FUNCTION(0x3, "jtag")), /* DO */
413 SUNXI_FUNCTION(0x3, "jtag")), /* CK */

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