1*4882a593Smuzhiyun RAMBOOT for MPC85xx Platforms 2*4882a593Smuzhiyun ============================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRAMBOOT literally means boot from DDR. But since DDR is volatile memory some 5*4882a593Smuzhiyunpre-mechanism is required to load the DDR with the bootloader binary. 6*4882a593Smuzhiyun- In case of SD and SPI boot this is done by BootROM code inside the chip 7*4882a593Smuzhiyun itself. 8*4882a593Smuzhiyun- In case of NAND boot FCM supports loading initial 4K code from NAND flash 9*4882a593Smuzhiyun which can initialize the DDR and get the complete bootloader copied to DDR. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunIn addition to the above there could be some more methods to initialize the DDR 12*4882a593Smuzhiyunand load it manually. 13*4882a593SmuzhiyunTwo of them are described below.There is also an explanation as to where these 14*4882a593Smuzhiyunmethods could be handy. 15*4882a593Smuzhiyun1. Load the RAM based bootloader onto DDR via JTAG/BDI interface. And then 16*4882a593Smuzhiyun execute the bootloader from DDR. 17*4882a593Smuzhiyun This may be handy in the following cases: 18*4882a593Smuzhiyun - In very early stage of platform bringup where other boot options are not 19*4882a593Smuzhiyun functional because of various reasons. 20*4882a593Smuzhiyun - In case the support to program the flashes on the board is not available. 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun2. Load the RAM based bootloader onto DDR using already existing bootloader on 23*4882a593Smuzhiyun the board.And then execute the bootloader from DDR. 24*4882a593Smuzhiyun Some usecases where this may be used: 25*4882a593Smuzhiyun - While developing some new feature of u-boot, for example USB driver or 26*4882a593Smuzhiyun SPI driver. 27*4882a593Smuzhiyun Suppose the board already has a working bootloader on it. And you would 28*4882a593Smuzhiyun prefer to keep it intact, at the same time want to test your bootloader. 29*4882a593Smuzhiyun In this case you can get your test bootloader binary into DDR via tftp 30*4882a593Smuzhiyun for example. Then execute the test bootloader. 31*4882a593Smuzhiyun - Suppose a platform already has a propreitery bootloader which does not 32*4882a593Smuzhiyun support for example AMP boot. In this case also RAM boot loader can be 33*4882a593Smuzhiyun utilized. 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun So basically when the original bootloader is required to be kept intact 36*4882a593Smuzhiyun RAM based bootloader can offer an updated bootloader on the system. 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunBoth the above Bootloaders are slight variants of SDcard or SPI Flash 39*4882a593Smuzhiyunbootloader or for that matter even NAND bootloader. 40*4882a593SmuzhiyunAll of them define CONFIG_SYS_RAMBOOT. 41*4882a593SmuzhiyunThe main difference among all of them is the way the pre-environment is getting 42*4882a593Smuzhiyunconfigured and who is doing that. 43*4882a593Smuzhiyun- In case of SD card and SPI flash bootloader this is done by On Chip BootROM inside the Si itself. 44*4882a593Smuzhiyun- In case of NAND boot SPL/TPL code does it with some support from Si itself. 45*4882a593Smuzhiyun- In case of the pure RAM based bootloaders we have to do it by JTAG manually or already existing bootloader. 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunHow to use them: 48*4882a593Smuzhiyun1. Using JTAG 49*4882a593Smuzhiyun Boot up in core hold off mode or stop the core after reset using JTAG 50*4882a593Smuzhiyun interface. 51*4882a593Smuzhiyun Preconfigure DDR/L2SRAM through JTAG interface. 52*4882a593Smuzhiyun - setup DDR controller registers. 53*4882a593Smuzhiyun - setup DDR LAWs 54*4882a593Smuzhiyun - setup DDR TLB 55*4882a593Smuzhiyun Load the RAM based boot loader to the proper location in DDR/L2SRAM. 56*4882a593Smuzhiyun set up IAR (Instruction counter properly) 57*4882a593Smuzhiyun Enable the core to execute. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun2. Using already existing bootloader. 60*4882a593Smuzhiyun get the rambased boot loader binary into DDR/L2SRAM via tftp. 61*4882a593Smuzhiyun execute the RAM based bootloader. 62*4882a593Smuzhiyun => tftp 11000000 u-boot-ram.bin 63*4882a593Smuzhiyun => go 1107f000 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunPlease note that L2SRAM can also be used instead of DDR if the SOC has 66*4882a593Smuzhiyunsufficient size of L2SRAM. 67*4882a593Smuzhiyun 68*4882a593SmuzhiyunNecessary Code changes Required: 69*4882a593Smuzhiyun===================================== 70*4882a593SmuzhiyunPlease note that below mentioned changes are for 85xx platforms. 71*4882a593SmuzhiyunThey have been tested on P1020/P2020/P1010 RDB. 72*4882a593Smuzhiyun 73*4882a593SmuzhiyunThe main difference between the above two methods from technical perspective is 74*4882a593Smuzhiyunthat in 1st case SOC is just out of reset so it is in default configuration. 75*4882a593Smuzhiyun(CCSRBAR is at 0xff700000). 76*4882a593SmuzhiyunIn the 2nd case bootloader has already re-located CCSRBAR to 0xffe00000 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun1. File name-> boards.cfg 79*4882a593Smuzhiyun There can be added specific Make options for RAMBoot. We can keep different 80*4882a593Smuzhiyun options for the two cases mentioned above. 81*4882a593Smuzhiyun for example 82*4882a593Smuzhiyun P1020RDB_JTAG_RAMBOOT and P1020RDB_GO_RAMBOOT. 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun2. platform config file 85*4882a593Smuzhiyun for example include/configs/P1_P2_RDB.h 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun #ifdef CONFIG_RAMBOOT 88*4882a593Smuzhiyun #define CONFIG_SDCARD 89*4882a593Smuzhiyun #endif 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun This will finally use the CONFIG_SYS_RAMBOOT. 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun3. Change CONFIG_SYS_CCSRBAR_DEFAULT in menuconfig accordingly. 94*4882a593Smuzhiyun In the section of the particular SOC, for example P1020, pseudo code 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #if defined(CONFIG_GO) 97*4882a593Smuzhiyun #define CONFIG_SYS_CCSRBAR_DEFAULT 0xffe00000 98*4882a593Smuzhiyun #else 99*4882a593Smuzhiyun #define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 100*4882a593Smuzhiyun #endif 101*4882a593Smuzhiyun 102*4882a593SmuzhiyunFor JTAG RAMBOOT this is not required because CCSRBAR is at ff700000. 103