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/OK3568_Linux_fs/kernel/drivers/gpu/drm/etnaviv/
H A Detnaviv_gpu.c35 { .name = "etnaviv-gpu,2d" },
43 int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value) in etnaviv_gpu_get_param() argument
45 struct etnaviv_drm_private *priv = gpu->drm->dev_private; in etnaviv_gpu_get_param()
49 *value = gpu->identity.model; in etnaviv_gpu_get_param()
53 *value = gpu->identity.revision; in etnaviv_gpu_get_param()
57 *value = gpu->identity.features; in etnaviv_gpu_get_param()
61 *value = gpu->identity.minor_features0; in etnaviv_gpu_get_param()
65 *value = gpu->identity.minor_features1; in etnaviv_gpu_get_param()
69 *value = gpu->identity.minor_features2; in etnaviv_gpu_get_param()
73 *value = gpu->identity.minor_features3; in etnaviv_gpu_get_param()
[all …]
H A Detnaviv_buffer.c89 static void etnaviv_cmd_select_pipe(struct etnaviv_gpu *gpu, in etnaviv_cmd_select_pipe() argument
94 lockdep_assert_held(&gpu->lock); in etnaviv_cmd_select_pipe()
102 if (gpu->exec_state == ETNA_PIPE_2D) in etnaviv_cmd_select_pipe()
104 else if (gpu->exec_state == ETNA_PIPE_3D) in etnaviv_cmd_select_pipe()
115 static void etnaviv_buffer_dump(struct etnaviv_gpu *gpu, in etnaviv_buffer_dump() argument
121 dev_info(gpu->dev, "virt %p phys 0x%08x free 0x%08x\n", in etnaviv_buffer_dump()
123 &gpu->mmu_context->cmdbuf_mapping) + in etnaviv_buffer_dump()
132 * The GPU may be executing this WAIT while we're modifying it, so we have
133 * to write it in a specific order to avoid the GPU branching to somewhere
151 static u32 etnaviv_buffer_reserve(struct etnaviv_gpu *gpu, in etnaviv_buffer_reserve() argument
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/
H A Dmsm_gpu.c27 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_target() local
37 if (gpu->funcs->gpu_set_freq) in msm_devfreq_target()
38 gpu->funcs->gpu_set_freq(gpu, opp); in msm_devfreq_target()
40 clk_set_rate(gpu->core_clk, *freq); in msm_devfreq_target()
50 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_get_dev_status() local
53 if (gpu->funcs->gpu_get_freq) in msm_devfreq_get_dev_status()
54 status->current_frequency = gpu->funcs->gpu_get_freq(gpu); in msm_devfreq_get_dev_status()
56 status->current_frequency = clk_get_rate(gpu->core_clk); in msm_devfreq_get_dev_status()
58 status->busy_time = gpu->funcs->gpu_busy(gpu); in msm_devfreq_get_dev_status()
61 status->total_time = ktime_us_delta(time, gpu->devfreq.time); in msm_devfreq_get_dev_status()
[all …]
H A Dmsm_gpu.h45 int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
46 int (*hw_init)(struct msm_gpu *gpu);
47 int (*pm_suspend)(struct msm_gpu *gpu);
48 int (*pm_resume)(struct msm_gpu *gpu);
49 void (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit);
50 void (*flush)(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
52 struct msm_ringbuffer *(*active_ring)(struct msm_gpu *gpu);
53 void (*recover)(struct msm_gpu *gpu);
54 void (*destroy)(struct msm_gpu *gpu);
56 /* show GPU status in debugfs: */
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/adreno/
H A Da5xx_gpu.c17 static void a5xx_dump(struct msm_gpu *gpu);
21 void a5xx_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, in a5xx_flush() argument
24 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a5xx_flush()
54 gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); in a5xx_flush()
57 static void a5xx_submit_in_rb(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a5xx_submit_in_rb() argument
59 struct msm_drm_private *priv = gpu->dev->dev_private; in a5xx_submit_in_rb()
104 a5xx_flush(gpu, ring, true); in a5xx_submit_in_rb()
105 a5xx_preempt_trigger(gpu); in a5xx_submit_in_rb()
111 a5xx_idle(gpu, ring); in a5xx_submit_in_rb()
113 msm_gpu_retire(gpu); in a5xx_submit_in_rb()
[all …]
H A Da3xx_gpu.c28 static void a3xx_dump(struct msm_gpu *gpu);
29 static bool a3xx_idle(struct msm_gpu *gpu);
31 static void a3xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a3xx_submit() argument
33 struct msm_drm_private *priv = gpu->dev->dev_private; in a3xx_submit()
70 /* BIT(31) of CACHE_FLUSH_TS triggers CACHE_FLUSH_TS IRQ from GPU */ in a3xx_submit()
83 adreno_flush(gpu, ring, REG_AXXX_CP_RB_WPTR); in a3xx_submit()
86 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init() argument
88 struct msm_ringbuffer *ring = gpu->rb[0]; in a3xx_me_init()
109 adreno_flush(gpu, ring, REG_AXXX_CP_RB_WPTR); in a3xx_me_init()
110 return a3xx_idle(gpu); in a3xx_me_init()
[all …]
H A Da6xx_gpu.c15 static inline bool _a6xx_check_idle(struct msm_gpu *gpu) in _a6xx_check_idle() argument
17 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in _a6xx_check_idle()
25 if (gpu_read(gpu, REG_A6XX_RBBM_STATUS) & in _a6xx_check_idle()
29 return !(gpu_read(gpu, REG_A6XX_RBBM_INT_0_STATUS) & in _a6xx_check_idle()
33 bool a6xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in a6xx_idle() argument
36 if (!adreno_idle(gpu, ring)) in a6xx_idle()
39 if (spin_until(_a6xx_check_idle(gpu))) { in a6xx_idle()
40 DRM_ERROR("%s: %ps: timeout waiting for GPU to idle: status %8.8X irq %8.8X rptr/wptr %d/%d\n", in a6xx_idle()
41 gpu->name, __builtin_return_address(0), in a6xx_idle()
42 gpu_read(gpu, REG_A6XX_RBBM_STATUS), in a6xx_idle()
[all …]
H A Da4xx_gpu.c22 static void a4xx_dump(struct msm_gpu *gpu);
23 static bool a4xx_idle(struct msm_gpu *gpu);
25 static void a4xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a4xx_submit() argument
27 struct msm_drm_private *priv = gpu->dev->dev_private; in a4xx_submit()
64 /* BIT(31) of CACHE_FLUSH_TS triggers CACHE_FLUSH_TS IRQ from GPU */ in a4xx_submit()
70 adreno_flush(gpu, ring, REG_A4XX_CP_RB_WPTR); in a4xx_submit()
77 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg() argument
79 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a4xx_enable_hwcg()
82 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL_TP(i), 0x02222202); in a4xx_enable_hwcg()
84 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL2_TP(i), 0x00002222); in a4xx_enable_hwcg()
[all …]
H A Da5xx_power.c103 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts() argument
105 struct drm_device *dev = gpu->dev; in _get_mvolts()
122 static void a530_lm_setup(struct msm_gpu *gpu) in a530_lm_setup() argument
124 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a530_lm_setup()
130 gpu_write(gpu, a5xx_sequence_regs[i].reg, in a530_lm_setup()
133 /* Hard code the A530 GPU thermal sensor ID for the GPMU */ in a530_lm_setup()
134 gpu_write(gpu, REG_A5XX_GPMU_TEMP_SENSOR_ID, 0x60007); in a530_lm_setup()
135 gpu_write(gpu, REG_A5XX_GPMU_DELTA_TEMP_THRESHOLD, 0x01); in a530_lm_setup()
136 gpu_write(gpu, REG_A5XX_GPMU_TEMP_SENSOR_CONFIG, 0x01); in a530_lm_setup()
139 gpu_write(gpu, REG_A5XX_GPMU_GPMU_VOLTAGE, 0x80000000 | 0); in a530_lm_setup()
[all …]
H A Dadreno_gpu.h49 int (*get_timestamp)(struct msm_gpu *gpu, uint64_t *value);
87 * of gpu firmware to linux-firmware, the fw files were
111 * GPU specific offsets will be exported by GPU specific
143 static inline bool adreno_is_a2xx(struct adreno_gpu *gpu) in adreno_is_a2xx() argument
145 return (gpu->revn < 300); in adreno_is_a2xx()
148 static inline bool adreno_is_a20x(struct adreno_gpu *gpu) in adreno_is_a20x() argument
150 return (gpu->revn < 210); in adreno_is_a20x()
153 static inline bool adreno_is_a225(struct adreno_gpu *gpu) in adreno_is_a225() argument
155 return gpu->revn == 225; in adreno_is_a225()
158 static inline bool adreno_is_a305(struct adreno_gpu *gpu) in adreno_is_a305() argument
[all …]
H A Da2xx_gpu.c10 static void a2xx_dump(struct msm_gpu *gpu);
11 static bool a2xx_idle(struct msm_gpu *gpu);
13 static void a2xx_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit) in a2xx_submit() argument
15 struct msm_drm_private *priv = gpu->dev->dev_private; in a2xx_submit()
52 adreno_flush(gpu, ring, REG_AXXX_CP_RB_WPTR); in a2xx_submit()
55 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init() argument
57 struct msm_ringbuffer *ring = gpu->rb[0]; in a2xx_me_init()
98 adreno_flush(gpu, ring, REG_AXXX_CP_RB_WPTR); in a2xx_me_init()
99 return a2xx_idle(gpu); in a2xx_me_init()
102 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init() argument
[all …]
H A Da5xx_preempt.c25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state() argument
34 atomic_set(&gpu->preempt_state, new); in set_preempt_state()
40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr() argument
52 gpu_write(gpu, REG_A5XX_CP_RB_WPTR, wptr); in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring() argument
61 for (i = 0; i < gpu->nr_rings; i++) { in get_next_ring()
63 struct msm_ringbuffer *ring = gpu->rb[i]; in get_next_ring()
79 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer() local
80 struct drm_device *dev = gpu->dev; in a5xx_preempt_timer()
86 DRM_DEV_ERROR(dev->dev, "%s: preemption timed out\n", gpu->name); in a5xx_preempt_timer()
[all …]
H A Da6xx_gpu_state.c112 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init() argument
115 dumper->ptr = msm_gem_kernel_new_locked(gpu->dev, in a6xx_crashdumper_init()
116 SZ_1M, MSM_BO_UNCACHED, gpu->aspace, in a6xx_crashdumper_init()
125 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run() argument
128 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a6xx_crashdumper_run()
142 gpu_write64(gpu, REG_A6XX_CP_CRASH_SCRIPT_BASE_LO, in a6xx_crashdumper_run()
145 gpu_write(gpu, REG_A6XX_CP_CRASH_DUMP_CNTL, 1); in a6xx_crashdumper_run()
147 ret = gpu_poll_timeout(gpu, REG_A6XX_CP_CRASH_DUMP_STATUS, val, in a6xx_crashdumper_run()
150 gpu_write(gpu, REG_A6XX_CP_CRASH_DUMP_CNTL, 0); in a6xx_crashdumper_run()
156 static int debugbus_read(struct msm_gpu *gpu, u32 block, u32 offset, in debugbus_read() argument
[all …]
H A Dadreno_gpu.c24 static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, in zap_shader_load_mdt() argument
27 struct device *dev = &gpu->pdev->dev; in zap_shader_load_mdt()
79 ret = request_firmware_direct(&fw, fwname, gpu->dev->dev); in zap_shader_load_mdt()
84 fw = adreno_request_fw(to_adreno_gpu(gpu), fwname); in zap_shader_load_mdt()
134 if (signed_fwname || (to_adreno_gpu(gpu)->fwloc == FW_LOCATION_LEGACY)) { in zap_shader_load_mdt()
170 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load() argument
172 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_zap_shader_load()
173 struct platform_device *pdev = gpu->pdev; in adreno_zap_shader_load()
185 return zap_shader_load_mdt(gpu, adreno_gpu->info->zapfw, pasid); in adreno_zap_shader_load()
189 adreno_iommu_create_address_space(struct msm_gpu *gpu, in adreno_iommu_create_address_space() argument
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/backend/gpu/
H A DKbuild17 backend/gpu/mali_kbase_cache_policy_backend.c \
18 backend/gpu/mali_kbase_device_hw.c \
19 backend/gpu/mali_kbase_gpu.c \
20 backend/gpu/mali_kbase_gpuprops_backend.c \
21 backend/gpu/mali_kbase_debug_job_fault_backend.c \
22 backend/gpu/mali_kbase_irq_linux.c \
23 backend/gpu/mali_kbase_instr_backend.c \
24 backend/gpu/mali_kbase_jm_as.c \
25 backend/gpu/mali_kbase_jm_hw.c \
26 backend/gpu/mali_kbase_jm_rb.c \
[all …]
/OK3568_Linux_fs/kernel/Documentation/gpu/
H A Di915.rst19 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
22 .. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
25 .. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c
31 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
34 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
37 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
40 .. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
46 .. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c
49 .. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c
55 .. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c
[all …]
H A Damdgpu.rst13 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
31 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
34 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
40 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
43 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
49 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
52 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_mn.c
58 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
61 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
67 .. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
[all …]
H A Ddrm-kms-helpers.rst53 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
59 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
68 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
74 .. kernel-doc:: drivers/gpu/drm/drm_atomic_state_helper.c
80 .. kernel-doc:: drivers/gpu/drm/drm_atomic_state_helper.c
86 .. kernel-doc:: drivers/gpu/drm/drm_simple_kms_helper.c
92 .. kernel-doc:: drivers/gpu/drm/drm_simple_kms_helper.c
98 .. kernel-doc:: drivers/gpu/drm/drm_fb_helper.c
104 .. kernel-doc:: drivers/gpu/drm/drm_fb_helper.c
110 .. kernel-doc:: drivers/gpu/drm/drm_format_helper.c
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A DKconfig206 GPU memory management subsystem for devices with multiple
207 GPU memory types. Will be enabled automatically if a device driver
257 source "drivers/gpu/drm/i2c/Kconfig"
259 source "drivers/gpu/drm/arm/Kconfig"
279 source "drivers/gpu/drm/radeon/Kconfig"
282 tristate "AMD GPU"
298 source "drivers/gpu/drm/amd/amdgpu/Kconfig"
300 source "drivers/gpu/drm/nouveau/Kconfig"
302 source "drivers/gpu/drm/i915/Kconfig"
320 running GPU in a headless machines. Choose this option to get
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/backend/gpu/
H A DKbuild22 backend/gpu/mali_kbase_cache_policy_backend.o \
23 backend/gpu/mali_kbase_gpuprops_backend.o \
24 backend/gpu/mali_kbase_irq_linux.o \
25 backend/gpu/mali_kbase_js_backend.o \
26 backend/gpu/mali_kbase_pm_backend.o \
27 backend/gpu/mali_kbase_pm_driver.o \
28 backend/gpu/mali_kbase_pm_metrics.o \
29 backend/gpu/mali_kbase_pm_ca.o \
30 backend/gpu/mali_kbase_pm_always_on.o \
31 backend/gpu/mali_kbase_pm_coarse_demand.o \
[all …]
/OK3568_Linux_fs/external/libmali/debian/
H A Dcontrol28 Description: Mali GPU User-Space Binary Drivers
36 Description: Mali GPU User-Space Binary Drivers
44 Description: Mali GPU User-Space Binary Drivers
52 Description: Mali GPU User-Space Binary Drivers
60 Description: Mali GPU User-Space Binary Drivers
68 Description: Mali GPU User-Space Binary Drivers
76 Description: Mali GPU User-Space Binary Drivers
84 Description: Mali GPU User-Space Binary Drivers
92 Description: Mali GPU User-Space Binary Drivers
100 Description: Mali GPU User-Space Binary Drivers
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/
H A Dmali_kbase_config_defaults.h37 /* Restrict GPU to a half of maximum Address ID count.
38 * This will reduce performance, but reduce bus load due to GPU.
42 /* Restrict GPU to a quarter of maximum Address ID count.
43 * This will reduce performance, but reduce bus load due to GPU.
47 /* Restrict GPU to an eighth of maximum Address ID count.
48 * This will reduce performance, but reduce bus load due to GPU.
55 * Restricting ID width will reduce performance & bus load due to GPU.
59 /* Restrict GPU to 7/8 of maximum Address ID count. */
62 /* Restrict GPU to 3/4 of maximum Address ID count. */
65 /* Restrict GPU to 5/8 of maximum Address ID count. */
[all …]
/OK3568_Linux_fs/yocto/meta-rockchip/dynamic-layers/recipes-browser/chromium/chromium_109.0.5414/
H A D0017-media-Support-AV1-in-V4L2-VDA.patch8 media/gpu/v4l2/v4l2_device.cc | 9 +++++++++
9 media/gpu/v4l2/v4l2_vda_helpers.cc | 1 +
10 media/gpu/v4l2/v4l2_video_decode_accelerator.cc | 2 +-
11 media/gpu/v4l2/v4l2_video_decoder.cc | 1 +
12 media/gpu/v4l2/v4l2_video_decoder_backend_stateful.cc | 1 +
15 diff --git a/media/gpu/v4l2/v4l2_device.cc b/media/gpu/v4l2/v4l2_device.cc
17 --- a/media/gpu/v4l2/v4l2_device.cc
18 +++ b/media/gpu/v4l2/v4l2_device.cc
42 diff --git a/media/gpu/v4l2/v4l2_vda_helpers.cc b/media/gpu/v4l2/v4l2_vda_helpers.cc
44 --- a/media/gpu/v4l2/v4l2_vda_helpers.cc
[all …]
H A D0015-media-Support-HEVC-in-V4L2-VDA.patch8 media/gpu/v4l2/v4l2_device.cc | 9 +++++++++
9 media/gpu/v4l2/v4l2_vda_helpers.cc | 1 +
10 media/gpu/v4l2/v4l2_video_decode_accelerator.cc | 2 +-
11 media/gpu/v4l2/v4l2_video_decoder.cc | 1 +
12 media/gpu/v4l2/v4l2_video_decoder_backend_stateful.cc | 1 +
15 diff --git a/media/gpu/v4l2/v4l2_device.cc b/media/gpu/v4l2/v4l2_device.cc
17 --- a/media/gpu/v4l2/v4l2_device.cc
18 +++ b/media/gpu/v4l2/v4l2_device.cc
42 diff --git a/media/gpu/v4l2/v4l2_vda_helpers.cc b/media/gpu/v4l2/v4l2_vda_helpers.cc
44 --- a/media/gpu/v4l2/v4l2_vda_helpers.cc
[all …]
/OK3568_Linux_fs/yocto/meta-rockchip/dynamic-layers/recipes-browser/chromium/chromium_104.0.5112/
H A D0001-Add-support-for-V4L2VDA-on-Linux.patch30 media/gpu/BUILD.gn | 1 +
31 media/gpu/args.gni | 4 ++
34 media/gpu/v4l2/BUILD.gn | 41 ++++++------
35 media/gpu/v4l2/generic_v4l2_device.cc | 4 ++
36 media/gpu/v4l2/v4l2_device.cc | 66 +++++++++++++++++++
37 media/gpu/v4l2/v4l2_video_decoder.cc | 7 ++
46 #include "media/gpu/buildflags.h"
54 diff --git a/media/gpu/BUILD.gn b/media/gpu/BUILD.gn
56 --- a/media/gpu/BUILD.gn
57 +++ b/media/gpu/BUILD.gn
[all …]

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