| /OK3568_Linux_fs/yocto/poky/meta/recipes-devtools/valgrind/valgrind/ |
| H A D | 0001-makefiles-Drop-setting-mcpu-to-cortex-a8-on-arm-arch.patch | 3 Date: Thu, 20 Apr 2017 10:11:16 -0700
4 Subject: [PATCH] makefiles: Drop setting -mcpu to cortex-a8 on arm
7 We can not assume that all arches armv7+ are cortex-a8 only
8 it fails to build for rpi which is armv7ve based (cortex-a8) cpu
11 | cc1: warning: switch -mcpu=cortex-a8 conflicts with -march=armv7ve switch
13 Upstream-Status: Submitted [https://bugs.kde.org/show_bug.cgi?id=454346]
15 Signed-off-by: Khem Raj <raj.khem@gmail.com>
16 ---
17 Makefile.all.am | 6 +++---
18 helgrind/tests/Makefile.am | 6 +++---
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| H A D | use-appropriate-march-mcpu-mfpu-for-ARM-test-apps.patch | 3 Date: Tue, 19 Jan 2016 16:00:00 -0800
4 Subject: [PATCH] use appropriate -march/-mcpu/-mfpu for ARM test apps
7 -march/-mcpu/-mfpu flags to support the instructions being tested.
12 -march=armv7ve and -mcpu=cortex-a15 (since some TUNE_CCARGS may set
13 -march=armv7-a and adding -mcpu=cortex-a15 alone is not enough to
14 over-ride that).
18 Upstream-Status: Submitted [https://bugs.kde.org/show_bug.cgi?id=454346]
20 Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
21 ---
22 none/tests/arm/Makefile.am | 6 ++++--
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| /OK3568_Linux_fs/kernel/arch/arm/mach-realview/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
34 the ARM926EJ-S core tile, while on an ARMv6/v7 kernel, at least
35 one of the ARM1136, ARM1176, ARM11MPCore or Cortex-A9MPCore
39 bool "Support ARM1136J(F)-S Tile"
47 bool "Support ARM1176JZ(F)-S Tile"
54 bool "Support Multicore Cortex-A9 Tile"
57 Enable support for the Cortex-A9MPCore tile fitted to the
74 the ARM11MPCore. This platform has an on-board ARM11MPCore and has
75 support for PCI-E and Compact Flash.
79 bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S"
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-omap2/ |
| H A D | Kconfig | 79 The AM335x high performance SOC features a Cortex-A8
88 The AM335x high performance SOC features a Cortex-A8
107 The AM43xx high performance SOC features a Cortex-A9
108 ARM core, a quad core PRU-ICSS for industrial Ethernet
123 The AM335x high performance SOC features a Cortex-A8
124 ARM core, a dual core PRU-ICSS for industrial Ethernet
143 authenticated) and the code. See the doc/README.ti-secure
151 Reserved EMIF region start address. Set to "0" to auto-select
172 source "arch/arm/mach-omap2/omap3/Kconfig"
174 source "arch/arm/mach-omap2/omap4/Kconfig"
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/ |
| H A D | arm,realview.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
14 11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
26 - const: arm,realview-eb
27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S
28 (HBI-0147) was created as a development board to test ARM TrustZone,
31 - const: arm,realview-pb1176
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| H A D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
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| H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Rutland <mark.rutland@arm.com>
11 - Will Deacon <will.deacon@arm.com>
16 representation in the device tree should be done as under:-
21 - enum:
22 - apm,potenza-pmu
23 - arm,armv8-pmuv3 # Only for s/w models
24 - arm,arm1136-pmu
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| /OK3568_Linux_fs/yocto/poky/meta/recipes-multimedia/x264/x264/ |
| H A D | don-t-default-to-cortex-a9-with-neon.patch | 4 Subject: [PATCH] dont default to cortex-a9 with neon
6 -march flag is not in CFLAGS so this will always default to
7 -mcpu=cortex-a8 -mfpu=neon.
9 Upstream-Status: Pending
11 Signed-off-by: Andrei Gherzan <andrei@gherzan.ro>
12 Signed-off-by: Maxin B. John <maxin.john@intel.com>
13 ---
14 configure | 3 ---
15 1 file changed, 3 deletions(-)
17 diff --git a/configure b/configure
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | arm-realview-pba8.dts | 23 /dts-v1/;
24 #include "arm-realview-pbx.dtsi"
27 model = "ARM RealView Platform Baseboard for Cortex-A8";
28 compatible = "arm,realview-pba8";
32 #address-cells = <1>;
33 #size-cells = <0>;
34 enable-method = "arm,realview-smp";
38 compatible = "arm,cortex-a8";
44 compatible = "arm,cortex-a8-pmu";
45 interrupt-parent = <&intc>;
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| H A D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 #include <dt-bindings/clock/meson8-ddr-clkc.h>
8 #include <dt-bindings/clock/meson8b-clkc.h>
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include <dt-bindings/power/meson8-power.h>
11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a5";
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| /OK3568_Linux_fs/u-boot/doc/ |
| H A D | README.omap3 | 5 This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1]
6 family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8. Additionally,
24 * CompuLab Ltd. CM-T35 [8]
29 While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
30 with -march=armv5 to allow more compilers to work. For U-Boot code this has
66 * CM-T35:
75 To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
88 is typically used to write 2nd stage bootloader (known as 'x-loader') which is
99 ----
128 ---
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| H A D | README.s5pc1xx | 5 This README is about U-Boot support for SAMSUNG's ARM Cortex-A8 based S5PC1xx
15 While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
16 with -march=armv5 to allow more compilers to work. For U-Boot code this has
48 gpio_cfg_pin(&gpio->gpio_a, 0, GPIO_IRQ);
51 gpio_direction_input(&gpio->gpio_a, 0);
54 gpio_direction_output(&gpio->gpio_a, 0, 1);
57 gpio_set_value(&gpio->gpio_a, 0, 0);
60 value = gpio_get_value(&gpio->gpio_a, 0);
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| /OK3568_Linux_fs/yocto/poky/meta/conf/machine/include/arm/armv7a/ |
| H A D | tune-cortexa8.inc | 1 DEFAULTTUNE ?= "cortexa8thf-neon"
3 require conf/machine/include/arm/arch-armv7a.inc
5 TUNEVALID[cortexa8] = "Enable Cortex-A8 specific processor optimizations"
6 TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexa8', ' -mcpu=cortex-a8', '', d)}"
10 AVAILTUNES += "cortexa8 cortexa8t cortexa8-neon cortexa8t-neon"
11 ARMPKGARCH:tune-cortexa8 = "cortexa8"
12 ARMPKGARCH:tune-cortexa8t = "cortexa8"
13 ARMPKGARCH:tune-cortexa8-neon = "cortexa8"
14 ARMPKGARCH:tune-cortexa8t-neon = "cortexa8"
16 TUNE_FEATURES:tune-cortexa8 = "arm vfp cortexa8"
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| /OK3568_Linux_fs/kernel/arch/arm/mm/ |
| H A D | proc-v7.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v7.S
9 #include <linux/arm-smccc.h>
14 #include <asm/asm-offsets.h>
16 #include <asm/pgtable-hwdef.h>
19 #include "proc-macros.S"
22 #include "proc-v7-3level.S"
24 #include "proc-v7-2level.S"
46 * - loc - location to jump to for soft reset
47 * - hyp - indicate if restart occurs in HYP mode
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| /OK3568_Linux_fs/buildroot/arch/ |
| H A D | Config.in.arm | 146 bool "arm1136j-s"
152 bool "arm1136jf-s"
159 bool "arm1176jz-s"
165 bool "arm1176jzf-s"
181 bool "cortex-A5"
189 bool "cortex-A7"
197 bool "cortex-A8"
205 bool "cortex-A9"
213 bool "cortex-A12"
221 bool "cortex-A15"
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| /OK3568_Linux_fs/buildroot/toolchain/toolchain-external/toolchain-external-codesourcery-arm/ |
| H A D | Config.in | 22 - ARMv5TE, little endian, soft-float, glibc
25 - ARMv4T, little endian, soft-float, glibc
28 - ARMv7-A, Thumb 2, little endian, soft-float, glibc
29 Select Cortex-A8, Cortex-A9 or another ARMv7-A core
31 Set BR2_TARGET_OPTIMIZATION to -mthumb
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/aarch64/gcc-arm-10.3-2021.07-x86_64-aarch64-none-linux-gnu/share/doc/ld.html/ |
| H A D | ARM.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dt…
3 <!-- This file documents the GNU linker LD
4 (GNU Toolchain for the A-profile Architecture 10.3-2021.07 (arm-10.29))
7 Copyright (C) 1991-2021 Free Software Foundation, Inc.
12 with no Invariant Sections, with no Front-Cover Texts, and with no
13 Back-Cover Texts. A copy of the license is included in the
14 section entitled "GNU Free Documentation License". -->
15 <!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ -->
21 <meta name="resource-type" content="document">
24 <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/share/doc/ld.html/ |
| H A D | ARM.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dt…
3 <!-- This file documents the GNU linker LD
4 (GNU Toolchain for the A-profile Architecture 10.3-2021.07 (arm-10.29))
7 Copyright (C) 1991-2021 Free Software Foundation, Inc.
12 with no Invariant Sections, with no Front-Cover Texts, and with no
13 Back-Cover Texts. A copy of the license is included in the
14 section entitled "GNU Free Documentation License". -->
15 <!-- Created by GNU Texinfo 5.1, http://www.gnu.org/software/texinfo/ -->
21 <meta name="resource-type" content="document">
24 <meta http-equiv="Content-Type" content="text/html; charset=utf-8">
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| /OK3568_Linux_fs/kernel/arch/arm/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
131 The ARM series is a line of low-power-consumption RISC chip designs
133 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
134 manufactured, but legacy ARM-based PC hardware remains popular in
244 Patch phys-to-virt and virt-to-phys translation functions at
248 This can only be used with non-XIP MMU kernels where the base
294 bool "MMU-based Paged Memory Management Support"
297 Select if you want MMU-based virtualised addressing space
336 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
349 bool "EBSA-110"
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| /OK3568_Linux_fs/kernel/Documentation/arm/ |
| H A D | sunxi.rst | 10 ------------
11 Linux kernel mach directory: arch/arm/mach-sunxi
16 - Allwinner F20 (sun3i)
20 * ARM Cortex-A8 based SoCs
21 - Allwinner A10 (sun4i)
25 http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
28 …http://dl.linux-sunxi.org/A10/A10%20User%20Manual%20-%20v1.20%20%282012-04-09%2c%20DECRYPTED%29.pdf
30 - Allwinner A10s (sun5i)
34 http://dl.linux-sunxi.org/A10s/A10s%20Datasheet%20-%20v1.20%20%282012-03-27%29.pdf
36 - Allwinner A13 / R8 (sun5i)
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| /OK3568_Linux_fs/buildroot/package/am33x-cm3/ |
| H A D | am33x-cm3.mk | 3 # am33x-cm3
9 AM33X_CM3_SITE = http://arago-project.org/git/projects/am33x-cm3.git
14 # The build command below will use the standard cross-compiler (normally
15 # build for Cortex-A8, to build the FW for the Cortex-M3.
17 $(TARGET_MAKE_ENV) $(MAKE) CC="$(TARGET_CC)" CROSS_COMPILE="$(TARGET_CROSS)" -C $(@D) all
22 $(INSTALL) -m 0644 -D $(@D)/bin/am335x-pm-firmware.bin \
23 $(TARGET_DIR)/lib/firmware/am335x-pm-firmware.bin
27 $(INSTALL) -m 0755 -D package/am33x-cm3/S93-am335x-pm-firmware-load \
28 $(TARGET_DIR)/etc/init.d/S93-am335x-pm-firmware-load
31 $(eval $(generic-package))
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| /OK3568_Linux_fs/buildroot/package/cpuburn-arm/ |
| H A D | Config.in | 9 bool "cpuburn-arm"
13 Cortex A7/A8/A9/A53.
15 https://github.com/ssvb/cpuburn-arm
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| /OK3568_Linux_fs/kernel/arch/arm/kernel/ |
| H A D | perf_event_v7.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * ARMv7 Cortex-A8 and Cortex-A9 Performance Events handling code.
11 * Cortex-A8 has up to 4 configurable performance counters and
13 * Cortex-A9 has up to 31 configurable performance counters and
55 * - all (taken) branch instructions,
56 * - instructions that explicitly write the PC,
57 * - exception generating instructions.
82 /* ARMv7 Cortex-A8 specific event types */
88 /* ARMv7 Cortex-A9 specific event types */
93 /* ARMv7 Cortex-A5 specific event types */
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| /OK3568_Linux_fs/kernel/arch/arm/mach-imx/ |
| H A D | cpu-imx5.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
19 static int mx5_cpu_rev = -1;
42 u32 rev = imx5_read_srev_reg("fsl,imx51-iim"); in get_mx51_srev()
60 if (mx5_cpu_rev == -1) in mx51_revision()
71 * Dependent on link order - so the assumption is that vfp_init is called
88 u32 rev = imx5_read_srev_reg("fsl,imx53-iim"); in get_mx53_srev()
108 if (mx5_cpu_rev == -1) in mx53_revision()
134 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a8-pmu"); in imx5_pmu_init()
138 if (!of_property_read_bool(np, "secure-reg-access")) in imx5_pmu_init()
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| /OK3568_Linux_fs/kernel/arch/arm/crypto/ |
| H A D | sha512-armv4.pl | 2 # SPDX-License-Identifier: GPL-2.0
22 # by gcc 3.4 and it spends ~72 clock cycles per byte [on single-issue
27 # Rescheduling for dual-issue pipeline resulted in 6% improvement on
28 # Cortex A8 core and ~40 cycles per processed byte.
32 # Profiler-assisted and platform-specific optimization resulted in 7%
33 # improvement on Coxtex A8 core and ~38 cycles per byte.
37 # Add NEON implementation. On Cortex A8 it was measured to process
38 # one byte in 23.3 cycles or ~60% faster than integer-only code.
44 # Technical writers asserted that 3-way S4 pipeline can sustain
46 # not be observed, see https://www.openssl.org/~appro/Snapdragon-S4.html
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