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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/
H A Drockchip,rk3588-cru.yaml60 reg = <0xfd7c0000 0x5c000>;
/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Db4860si-post.dtsi37 /* controller at 0x200000 */
64 dcsr-epu@0 {
79 reg = <0x13000 0x1000>;
96 reg = <0x108000 0x1000 0x109000 0x1000>;
101 reg = <0x110000 0x1000 0x111000 0x1000>;
106 reg = <0x118000 0x1000 0x119000 0x1000>;
113 reg = <0x38000 0x4000>, <0x100e000 0x1000>;
114 interrupts = <133 2 0 0>;
118 reg = <0x3c000 0x4000>, <0x100f000 0x1000>;
119 interrupts = <135 2 0 0>;
[all …]
H A Dt4240si-post.dtsi37 alloc-ranges = <0 0 0x10000 0>;
42 alloc-ranges = <0 0 0x10000 0>;
47 alloc-ranges = <0 0 0x10000 0>;
54 interrupts = <25 2 0 0>;
57 /* controller at 0x240000 */
59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
63 bus-range = <0x0 0xff>;
64 interrupts = <20 2 0 0>;
65 pcie@0 {
70 reg = <0 0 0 0 0>;
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dphy-mvebu-comphy.txt21 * Lane 0 (USB3/GbE)
26 - #size-cells: should be 0.
47 reg = <0x120000 0x6000>;
53 #size-cells = <0>;
55 cpm_comphy0: phy@0 {
56 reg = <0>;
68 reg = <0x18300 0x300>,
69 <0x1F000 0x400>,
70 <0x5C000 0x400>,
71 <0xe0178 0x8>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx6/
H A Dimx-regs.h12 #define ROMCP_ARB_BASE_ADDR 0x00000000
13 #define ROMCP_ARB_END_ADDR 0x000FFFFF
16 #define GPU_2D_ARB_BASE_ADDR 0x02200000
17 #define GPU_2D_ARB_END_ADDR 0x02203FFF
18 #define OPENVG_ARB_BASE_ADDR 0x02204000
19 #define OPENVG_ARB_END_ADDR 0x02207FFF
21 #define CAAM_ARB_BASE_ADDR 0x00100000
22 #define CAAM_ARB_END_ADDR 0x00107FFF
23 #define GPU_ARB_BASE_ADDR 0x01800000
24 #define GPU_ARB_END_ADDR 0x01803FFF
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/hisilicon/kirin/
H A Dkirin_dpe_reg.h27 #define PERRSTDIS3 (0x088)
29 #define DPE_GLB0_OFFSET (0x12000)
30 #define DPE_DBG_OFFSET (0x11000)
31 #define DPE_CMDLIST_OFFSET (0x02000)
32 #define DPE_SMMU_OFFSET (0x08000)
33 #define DPE_MIF_OFFSET (0x0A000)
34 #define DPE_MCTRL_SYS_OFFSET (0x10000)
35 #define DPE_MCTRL_CTL0_OFFSET (0x10800)
36 #define DPE_RCH_VG0_DMA_OFFSET (0x20000)
37 #define DPE_RCH_VG0_SCL_OFFSET (0x20200)
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a23.c36 .para1 = 0, /* not used (only used when tpr13 bit 31 is set */
37 .para2 = 0, /* not used (only used when tpr13 bit 31 is set */
41 .mr3 = 0,
43 .tpr0 = 0x2ab83def,
44 .tpr1 = 0x18082356,
45 .tpr2 = 0x00034156,
46 .tpr3 = 0x448c5533,
47 .tpr4 = 0x08010d00,
48 .tpr5 = 0x0340b20f,
49 .tpr6 = 0x20d118cc,
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/marvell/
H A Darmada-37xx.dtsi35 reg = <0 0x4000000 0 0x200000>;
42 #size-cells = <0>;
43 cpu0: cpu@0 {
46 reg = <0>;
80 /* 32M internal register @ 0xd000_0000 */
81 ranges = <0x0 0x0 0xd0000000 0x2000000>;
85 reg = <0x8300 0x40>;
93 reg = <0xd000 0x1000>;
99 #size-cells = <0>;
100 reg = <0x10600 0xA00>;
[all …]
/OK3568_Linux_fs/kernel/drivers/scsi/qla2xxx/
H A Dqla_fw.h14 #define MBS_CHECKSUM_ERROR 0x4010
15 #define MBS_INVALID_PRODUCT_KEY 0x4020
55 #define PDS_PLOGI_PENDING 0x03
56 #define PDS_PLOGI_COMPLETE 0x04
57 #define PDS_PRLI_PENDING 0x05
58 #define PDS_PRLI_COMPLETE 0x06
59 #define PDS_PORT_UNAVAILABLE 0x07
60 #define PDS_PRLO_PENDING 0x09
61 #define PDS_LOGO_PENDING 0x11
62 #define PDS_PRLI2_PENDING 0x12
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3588s.dtsi56 #size-cells = <0>;
91 cpu_l0: cpu@0 {
94 reg = <0x0>;
102 reg = <0x100>;
110 reg = <0x200>;
118 reg = <0x300>;
126 reg = <0x400>;
134 reg = <0x500>;
142 reg = <0x600>;
150 reg = <0x700>;
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
3 reg = <0x4a000000 0x800>,
4 <0x4a000800 0x800>,
5 <0x4a001000 0x1000>;
9 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
10 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
11 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
13 segment@0 { /* 0x4a000000 */
17 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
18 <0x00000800 0x00000800 0x000800>, /* ap 1 */
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588s.dtsi89 #clock-cells = <0>;
96 #clock-cells = <0>;
103 #clock-cells = <0>;
110 reg = <0 0xfd7c08ec 0 0x10>;
114 #clock-cells = <0>;
119 reg = <0 0xfd7c08b0 0 0x10>;
123 #clock-cells = <0>;
128 reg = <0 0xfd7c08dc 0 0x10>;
132 #clock-cells = <0>;
137 reg = <0 0xfd7c08a8 0 0x10>;
[all …]