Searched +full:0 +full:x4a101000 (Results 1 – 5 of 5) sorted by relevance
17 #define UART0_BASE 0x44E0900020 #define GPIO2_BASE 0x481AC00023 #define WDT_BASE 0x44E3500026 #define CTRL_BASE 0x44E1000027 #define CTRL_DEVICE_BASE 0x44E1060030 #define PRCM_BASE 0x44E0000031 #define CM_PER 0x44E0000032 #define CM_WKUP 0x44E0040033 #define CM_DPLL 0x44E0050034 #define CM_RTC 0x44E00800[all …]
17 #define L3F_CFG_BWLIMITER 0x4400520020 #define UART0_BASE 0x44E0900023 #define GPIO2_BASE 0x481AC00026 #define WDT_BASE 0x44E3500029 #define CTRL_BASE 0x44E1000030 #define CTRL_DEVICE_BASE 0x44E1060033 #define PRCM_BASE 0x44DF000034 #define CM_WKUP 0x44DF280035 #define CM_PER 0x44DF880036 #define CM_DPLL 0x44DF4200[all …]
68 #size-cells = <0>;69 reg = <0x4a101000 0x1000>;
42 #size-cells = <0>;43 cpu@0 {46 reg = <0>;104 ranges = <0 0x44c00000 0x280000>;108 reg = <0x200000 0x4000>;112 #size-cells = <0>;121 reg = <0x210000 0x2000>;124 ranges = <0 0x210000 0x2000>;128 reg = <0x800 0x238>;130 #size-cells = <0>;[all …]
33 #size-cells = <0>;34 cpu: cpu@0 {37 reg = <0>;50 reg = <0x48241000 0x1000>,51 <0x48240100 0x0100>;59 reg = <0x48281000 0x1000>;65 reg = <0x48242000 0x1000>;76 reg = <0x44000000 0x40000077 0x44800000 0x400000>;85 ranges = <0 0x44c00000 0x287000>;[all …]