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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/
H A Dk3-am65.dtsi68 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
69 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
70 <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
71 <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */
72 <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>, /* MAIN NAVSS */
73 <0x00 0x70000000 0x00 0x70000000 0x00 0x00200000>, /* MSMC SRAM */
74 <0x00 0x10000000 0x00 0x10000000 0x00 0x10000000>, /* PCIe DAT */
76 <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>,
77 <0x00 0x40200000 0x00 0x40200000 0x00 0x00900100>,
78 <0x00 0x40f00000 0x00 0x40f00000 0x00 0x00020000>, /* CTRL_MMR0 */
[all …]
H A Dk3-j7200.dtsi39 #size-cells = <0>;
53 cpu0: cpu@0 {
55 reg = <0x000>;
58 i-cache-size = <0xc000>;
61 d-cache-size = <0x8000>;
69 reg = <0x001>;
72 i-cache-size = <0xc000>;
75 d-cache-size = <0x8000>;
85 cache-size = <0x100000>;
125 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j721e.dtsi40 #size-cells = <0>;
54 cpu0: cpu@0 {
56 reg = <0x000>;
59 i-cache-size = <0xC000>;
62 d-cache-size = <0x8000>;
70 reg = <0x001>;
73 i-cache-size = <0xC000>;
76 d-cache-size = <0x8000>;
86 cache-size = <0x100000>;
127 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
H A Dk3-j7200-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x00 0x1000>;
39 reg = <0x00 0x40f00000 0x00 0x20000>;
42 ranges = <0x00 0x00 0x40f00000 0x20000>;
46 reg = <0x4040 0x4>;
53 reg = <0x00 0x43000014 0x00 0x4>;
58 /* Proxy 0 addressing */
59 reg = <0x00 0x4301c000 0x00 0x178>;
62 pinctrl-single,function-mask = <0xffffffff>;
67 reg = <0x00 0x41c00000 0x00 0x100000>;
68 ranges = <0x00 0x00 0x41c00000 0x100000>;
[all …]
H A Dk3-am65-mcu.dtsi11 reg = <0x0 0x40f00000 0x0 0x20000>;
14 ranges = <0x0 0x0 0x40f00000 0x20000>;
18 reg = <0x4040 0x4>;
25 reg = <0x00 0x40a00000 0x00 0x100>;
36 reg = <0x00 0x41c00000 0x00 0x80000>;
37 ranges = <0x0 0x00 0x41c00000 0x80000>;
44 reg = <0x0 0x40b00000 0x0 0x100>;
47 #size-cells = <0>;
55 reg = <0x0 0x40300000 0x0 0x400>;
60 #size-cells = <0>;
[all …]
H A Dk3-j721e-mcu-wakeup.dtsi19 reg = <0x00 0x44083000 0x0 0x1000>;
39 reg = <0x0 0x40f00000 0x0 0x20000>;
42 ranges = <0x0 0x0 0x40f00000 0x20000>;
46 reg = <0x4040 0x4>;
53 reg = <0x0 0x43000014 0x0 0x4>;
58 /* Proxy 0 addressing */
59 reg = <0x00 0x4301c000 0x00 0x178>;
62 pinctrl-single,function-mask = <0xffffffff>;
67 reg = <0x00 0x41c00000 0x00 0x100000>;
68 ranges = <0x0 0x00 0x41c00000 0x100000>;
[all …]
/OK3568_Linux_fs/yocto/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dserial.patch6 { "ISAR", 0x403016A0, 0, 0xffffffff, 'x', "I2C Slave Address Register" },
7 { "ISAR_SA", 0x403016A0, 0, 0x0000007f, 'x', "I2C Slave Address" },
9 +{ "HW_MCR", 0x41600010, 0, 0xffffffff, 'x', "HWUART Modem Control Register" },
10 +{ "HW_MSR", 0x41600018, 0, 0xffffffff, 'x', "HWUART Modem Status Register" },
12 { "PMCR", 0x40F00000, 0, 0xffffffff, 'x', "Power Manager Control Register (3-23)" },
13 { "PMCR_IDAE", 0x40F00000, 0, 0x00000001, 'd', "PM imprecise data abort abort signal" },
H A Dpxaregs.c44 { "IBMR", 0x40301680, 0, 0xffffffff, 'x', "I2C Bus Monitor Register" },
45 { "IBMR_SDAS", 0x40301680, 0, 0x00000001, 'x', "SDA Status" },
46 { "IBMR_SCLS", 0x40301680, 1, 0x00000001, 'x', "SDA Status" },
48 { "IDBR", 0x40301688, 0, 0xffffffff, 'x', "I2C Data Buffer Register" },
49 { "IDBR_IDB", 0x40301688, 0, 0x000000ff, 'x', "I2C Data Buffer" },
51 { "ICR", 0x40301690, 0, 0xffffffff, 'x', "I2C Control Register" },
52 { "ICR_START", 0x40301690, 0, 1, 'x', " start bit " },
53 { "ICR_STOP", 0x40301690, 1, 1, 'x', " stop bit " },
54 { "ICR_ACKNAK",0x40301690, 2, 1, 'x', " send ACK(0) or NAK(1)" },
55 { "ICR_TB", 0x40301690, 3, 1, 'x', " transfer byte bit " },
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml228 reg = <0x98000000 0x800000>;
237 ti,bootreg = <&scm_conf 0x304 0>;
243 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
244 resets = <&prm_tesla 0>, <&prm_tesla 1>;
261 reg = <0 0x95800000 0 0x3800000>;
273 reg = <0x55020000 0x10000>;
280 clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
298 reg = <0x0 0x99000000 0x0 0x4000000>;
310 reg = <0x40800000 0x48000>,
311 <0x40e00000 0x8000>,
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-pxa/include/mach/
H A Dpxa2xx-regs.h20 #define PMCR __REG(0x40F00000) /* Power Manager Control Register */
21 #define PSSR __REG(0x40F00004) /* Power Manager Sleep Status Register */
22 #define PSPR __REG(0x40F00008) /* Power Manager Scratch Pad Register */
23 #define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */
24 #define PRER __REG(0x40F00010) /* Power Manager GPIO Rising-Edge Detect Enable Register */
25 #define PFER __REG(0x40F00014) /* Power Manager GPIO Falling-Edge Detect Enable Register */
26 #define PEDR __REG(0x40F00018) /* Power Manager GPIO Edge Detect Status Register */
27 #define PCFR __REG(0x40F0001C) /* Power Manager General Configuration Register */
28 #define PGSR0 __REG(0x40F00020) /* Power Manager GPIO Sleep State Register for GP[31-0] */
29 #define PGSR1 __REG(0x40F00024) /* Power Manager GPIO Sleep State Register for GP[63-32] */
[all …]
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Ddra7.dtsi61 reg = <0x0 0x48211000 0x0 0x1000>,
62 <0x0 0x48212000 0x0 0x2000>,
63 <0x0 0x48214000 0x0 0x2000>,
64 <0x0 0x48216000 0x0 0x2000>;
73 reg = <0x0 0x48281000 0x0 0x1000>;
79 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0>;
108 opp-supported-hw = <0xFF 0x01>;
117 opp-supported-hw = <0xFF 0x02>;
[all …]
/OK3568_Linux_fs/kernel/sound/pci/mixart/
H A Dmixart_mixer.c24 0xc2c00000, /* [000] -96.0 dB */
25 0xc2bf0000, /* [001] -95.5 dB */
26 0xc2be0000, /* [002] -95.0 dB */
27 0xc2bd0000, /* [003] -94.5 dB */
28 0xc2bc0000, /* [004] -94.0 dB */
29 0xc2bb0000, /* [005] -93.5 dB */
30 0xc2ba0000, /* [006] -93.0 dB */
31 0xc2b90000, /* [007] -92.5 dB */
32 0xc2b80000, /* [008] -92.0 dB */
33 0xc2b70000, /* [009] -91.5 dB */
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/rtl8822cs/hal/phydm/rtl8822c/
H A Dhalhwimg8822c_bb.c30 #define CUT_DONT_CARE 0xf
31 #define RFE_DONT_CARE 0xff
32 #define PARA_IF 0x8
33 #define PARA_ELSE_IF 0x9
34 #define PARA_ELSE 0xa
35 #define PARA_END 0xb
36 #define PARA_CHK 0x4
47 u32 cut_para = 0, rfe_para = 0; in halbb_sel_headline()
48 u32 compare_target = 0; in halbb_sel_headline()
49 u32 cut_max = 0; in halbb_sel_headline()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h37 #define PXA_CS0_PHYS 0x00000000 /* for both small and large same start */
38 #define PXA_CS1_PHYS 0x04000000 /* Small partition start address (64MB) */
39 #define PXA_CS1_LPHYS 0x30000000 /* Large partition start address (256MB) */
40 #define PXA_CS2_PHYS 0x10000000 /* (64MB) */
41 #define PXA_CS3_PHYS 0x14000000 /* (64MB) */
42 #define PXA_PCMCIA_PHYS 0x20000000 /* (256MB) */
44 #define PXA_CS0_PHYS 0x00000000
45 #define PXA_CS1_PHYS 0x04000000
46 #define PXA_CS2_PHYS 0x08000000
47 #define PXA_CS3_PHYS 0x0C000000
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x80000015, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]