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/OK3568_Linux_fs/u-boot/arch/arm/mach-sunxi/
H A Dspl_spi_sunxi.c40 #define SUN4I_SPI0_CCTL (0x01C05000 + 0x1C)
41 #define SUN4I_SPI0_CTL (0x01C05000 + 0x08)
42 #define SUN4I_SPI0_RX (0x01C05000 + 0x00)
43 #define SUN4I_SPI0_TX (0x01C05000 + 0x04)
44 #define SUN4I_SPI0_FIFO_STA (0x01C05000 + 0x28)
45 #define SUN4I_SPI0_BC (0x01C05000 + 0x20)
46 #define SUN4I_SPI0_TC (0x01C05000 + 0x24)
48 #define SUN4I_CTL_ENABLE BIT(0)
58 #define SUN6I_SPI0_CCTL (0x01C68000 + 0x24)
59 #define SUN6I_SPI0_GCR (0x01C68000 + 0x04)
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/spi/
H A Dallwinner,sun6i-a31-spi.yaml62 "^.*@[0-9a-f]+":
67 minimum: 0
89 reg = <0x01c69000 0x1000>;
90 interrupts = <0 66 4>;
95 #size-cells = <0>;
101 reg = <0x01c68000 0x1000>;
102 interrupts = <0 65 4>;
109 #size-cells = <0>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun8i-v3s.dtsi70 #size-cells = <0>;
72 cpu@0 {
75 reg = <0>;
100 #clock-cells = <0>;
108 #clock-cells = <0>;
124 reg = <0x01000000 0x10000>;
136 reg = <0x01100000 0x100000>;
137 clocks = <&display_clocks 0>,
141 resets = <&display_clocks 0>;
145 #size-cells = <0>;
[all …]
H A Dsunxi-h3-h5.dtsi86 #clock-cells = <0>;
94 #clock-cells = <0>;
117 reg = <0x01000000 0x10000>;
128 compatible = "allwinner,sun8i-h3-de2-mixer-0";
129 reg = <0x01100000 0x100000>;
138 #size-cells = <0>;
152 reg = <0x01c02000 0x1000>;
162 reg = <0x01c0c000 0x1000>;
171 #size-cells = <0>;
173 tcon0_in: port@0 {
[all …]
H A Dsun6i-a31.dtsi100 #size-cells = <0>;
102 cpu0: cpu@0 {
105 reg = <0>;
216 #clock-cells = <0>;
224 #clock-cells = <0>;
241 #clock-cells = <0>;
248 #clock-cells = <0>;
255 #clock-cells = <0>;
257 reg = <0x01c200d0 0x4>;
277 reg = <0x01c02000 0x1000>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dsun6i-a31.dtsi64 simplefb_hdmi: framebuffer@0 {
68 clocks = <&pll6 0>;
76 clocks = <&pll6 0>;
94 #size-cells = <0>;
96 cpu0: cpu@0 {
99 reg = <0>;
110 cooling-min-level = <0>;
166 reg = <0x40000000 0x80000000>;
183 #clock-cells = <0>;
188 osc32k: clk@0 {
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64.dtsi46 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0>;
106 #clock-cells = <0>;
113 #clock-cells = <0>;
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&ths 0>;
221 polling-delay-passive = <0>;
222 polling-delay = <0>;
[all …]