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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Dmxgpu_vi.c47 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
48 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
49 mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100,
50 mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100,
51 mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100,
52 mmCGTT_CPC_CLK_CTRL, 0xffffffff, 0x00000100,
53 mmCGTT_CPF_CLK_CTRL, 0xffffffff, 0x40000100,
54 mmCGTT_DRM_CLK_CTRL0, 0xffffffff, 0x00600100,
55 mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100,
56 mmCGTT_IA_CLK_CTRL, 0xffffffff, 0x06000100,
[all …]
H A Dcik.c129 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in cik_uvd_ctx_rreg()
140 WREG32(mmUVD_CTX_INDEX, ((reg) & 0x1ff)); in cik_uvd_ctx_wreg()
169 0xc200, 0xe0ffffff, 0xe0000000
174 0x31dc, 0xffffffff, 0x00000800,
175 0x31dd, 0xffffffff, 0x00000800,
176 0x31e6, 0xffffffff, 0x00007fbf,
177 0x31e7, 0xffffffff, 0x00007faf
182 0xcd5, 0x00000333, 0x00000333,
183 0xcd4, 0x000c0fc0, 0x00040200,
184 0x2684, 0x00010000, 0x00058208,
[all …]
H A Dsi.c59 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
60 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
61 mmDB_DEBUG, 0xffffffff, 0x00000000,
62 mmDB_DEBUG2, 0xf00fffff, 0x00000400,
63 mmDB_DEBUG3, 0x0002021c, 0x00020200,
64 mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
65 0x340c, 0x000000c0, 0x00800040,
66 0x360c, 0x000000c0, 0x00800040,
67 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
68 mmFBC_MISC, 0x00200000, 0x50100000,
[all …]
H A Dsdma_v3_0.c82 mmSDMA0_CHICKEN_BITS, 0xfc910007, 0x00810007,
83 mmSDMA0_CLK_CTRL, 0xff000fff, 0x00000000,
84 mmSDMA0_GFX_IB_CNTL, 0x800f0111, 0x00000100,
85 mmSDMA0_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
86 mmSDMA0_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
87 mmSDMA1_CHICKEN_BITS, 0xfc910007, 0x00810007,
88 mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000,
89 mmSDMA1_GFX_IB_CNTL, 0x800f0111, 0x00000100,
90 mmSDMA1_RLC0_IB_CNTL, 0x800f0111, 0x00000100,
91 mmSDMA1_RLC1_IB_CNTL, 0x800f0111, 0x00000100,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/sti/
H A Dsti_hqvdp_lut.h24 0x0000ffff, 0x00010000, 0x000100ff, 0x00000000,
25 0x00000000, 0x00050000, 0xfffc00ff, 0x00000000,
26 0x00000000, 0x00090000, 0xfff900fe, 0x00000000,
27 0x00000000, 0x0010ffff, 0xfff600fb, 0x00000000,
28 0x00000000, 0x0017fffe, 0xfff400f7, 0x00000000,
29 0x00000000, 0x001ffffd, 0xfff200f2, 0x00000000,
30 0x00000000, 0x0027fffc, 0xfff100ec, 0x00000000,
31 0x00000000, 0x0030fffb, 0xfff000e5, 0x00000000,
32 0x00000000, 0x003afffa, 0xffee00de, 0x00000000,
33 0x00000000, 0x0044fff9, 0xffed00d6, 0x00000000,
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Dbtc_dpm.c36 #define MC_CG_ARB_FREQ_F0 0x0a
37 #define MC_CG_ARB_FREQ_F1 0x0b
38 #define MC_CG_ARB_FREQ_F2 0x0c
39 #define MC_CG_ARB_FREQ_F3 0x0d
41 #define MC_CG_SEQ_DRAMCONF_S0 0x05
42 #define MC_CG_SEQ_DRAMCONF_S1 0x06
43 #define MC_CG_SEQ_YCLK_SUSPEND 0x04
44 #define MC_CG_SEQ_YCLK_RESUME 0x0a
46 #define SMC_RAM_END 0x8000
61 0x000008f8, 0x00000010, 0xffffffff,
[all …]
H A Devergreen.c42 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
43 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
44 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
55 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_rreg()
66 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff)); in eg_cg_wreg()
77 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_rreg()
88 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff)); in eg_pif_phy0_wreg()
99 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_rreg()
110 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff)); in eg_pif_phy1_wreg()
129 0x98fc,
[all …]
H A Dsi.c166 #define DC_HPDx_CONTROL(x) (DC_HPD1_CONTROL + (x * 0xc))
167 #define DC_HPDx_INT_CONTROL(x) (DC_HPD1_INT_CONTROL + (x * 0xc))
168 #define DC_HPDx_INT_STATUS_REG(x) (DC_HPD1_INT_STATUS + (x * 0xc))
172 (0x8000 << 16) | (0x98f4 >> 2),
173 0x00000000,
174 (0x8040 << 16) | (0x98f4 >> 2),
175 0x00000000,
176 (0x8000 << 16) | (0xe80 >> 2),
177 0x00000000,
178 (0x8040 << 16) | (0xe80 >> 2),
[all …]
/OK3568_Linux_fs/u-boot/board/renesas/blanche/
H A Dqos.c73 writel(0x20082004, DBSC3_0_DBADJ2); in qos_init()
77 // writel(0x00000000, &s3c->s3cadsplcr); in qos_init()
78 writel(0x1F0D0C0C, &s3c->s3crorr); in qos_init()
79 writel(0x1F1F0C0C, &s3c->s3cworr); in qos_init()
83 writel(0x00890089, &s3c_qos->s3cqos0); in qos_init()
84 writel(0x20960010, &s3c_qos->s3cqos1); in qos_init()
85 writel(0x20302030, &s3c_qos->s3cqos2); in qos_init()
86 writel(0x20AA2200, &s3c_qos->s3cqos3); in qos_init()
87 writel(0x00002032, &s3c_qos->s3cqos4); in qos_init()
88 writel(0x20960010, &s3c_qos->s3cqos5); in qos_init()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/renesas/
H A Dravb.h38 #define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */
39 #define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */
41 #define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */
42 #define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */
43 #define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002
44 #define RAVB_RXTSTAMP_TYPE_ALL 0x00000006
45 #define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */
49 CCC = 0x0000,
50 DBAT = 0x0004,
51 DLR = 0x0008,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3399-sdram-lpddr3-4GB-1600.dtsi9 0x2
10 0xa
11 0x3
12 0x2
13 0x2
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A Drk3399-sdram-ddr3-4G-1600.dtsi9 0x2
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A Drk3399-sdram-ddr3-1866.dtsi9 0x1
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A Drk3399-sdram-ddr3-1600.dtsi9 0x1
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
H A Drk3399-sdram-ddr3-1333.dtsi9 0x1
10 0xa
11 0x3
12 0x2
13 0x1
14 0x0
15 0xf
16 0xf
17 0
18 0
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/etnaviv/
H A Dcommon.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
43 #define PIPE_ID_PIPE_3D 0x00000000
44 #define PIPE_ID_PIPE_2D 0x00000001
45 #define SYNC_RECIPIENT_FE 0x00000001
46 #define SYNC_RECIPIENT_RA 0x00000005
47 #define SYNC_RECIPIENT_PE 0x00000007
48 #define SYNC_RECIPIENT_DE 0x0000000b
49 #define SYNC_RECIPIENT_BLT 0x00000010
50 #define ENDIAN_MODE_NO_SWAP 0x00000000
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_9_4_1_default.h26 #define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9
27 #define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9
28 #define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9
29 #define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9
30 #define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9
31 #define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9
32 #define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9
33 #define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9
34 #define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9
35 #define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9
[all …]
H A Dmmhub_1_0_default.h26 #define mmDAGB0_RDCLI0_DEFAULT 0xfe5fe0f9
27 #define mmDAGB0_RDCLI1_DEFAULT 0xfe5fe0f9
28 #define mmDAGB0_RDCLI2_DEFAULT 0xfe5fe0f9
29 #define mmDAGB0_RDCLI3_DEFAULT 0xfe5fe0f9
30 #define mmDAGB0_RDCLI4_DEFAULT 0xfe5fe0f9
31 #define mmDAGB0_RDCLI5_DEFAULT 0xfe5fe0f9
32 #define mmDAGB0_RDCLI6_DEFAULT 0xfe5fe0f9
33 #define mmDAGB0_RDCLI7_DEFAULT 0xfe5fe0f9
34 #define mmDAGB0_RDCLI8_DEFAULT 0xfe5fe0f9
35 #define mmDAGB0_RDCLI9_DEFAULT 0xfe5fe0f9
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/smsc/
H A Dsmsc911x.h12 #define LAN9115 0x01150000
13 #define LAN9116 0x01160000
14 #define LAN9117 0x01170000
15 #define LAN9118 0x01180000
16 #define LAN9215 0x115A0000
17 #define LAN9216 0x116A0000
18 #define LAN9217 0x117A0000
19 #define LAN9218 0x118A0000
20 #define LAN9210 0x92100000
21 #define LAN9211 0x92110000
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_default.h26 #define mmSDMA0_DEC_START_DEFAULT 0x00000000
27 #define mmSDMA0_PG_CNTL_DEFAULT 0x00000000
28 #define mmSDMA0_PG_CTX_LO_DEFAULT 0x00000000
29 #define mmSDMA0_PG_CTX_HI_DEFAULT 0x00000000
30 #define mmSDMA0_PG_CTX_CNTL_DEFAULT 0x00000000
31 #define mmSDMA0_POWER_CNTL_DEFAULT 0x40000050
32 #define mmSDMA0_CLK_CTRL_DEFAULT 0x00000100
33 #define mmSDMA0_CNTL_DEFAULT 0x000000c2
34 #define mmSDMA0_CHICKEN_BITS_DEFAULT 0x01af0107
35 #define mmSDMA0_GB_ADDR_CONFIG_DEFAULT 0x00000044
[all …]
/OK3568_Linux_fs/u-boot/drivers/mmc/
H A Darm_pl180_mmci.h23 #define INIT_PWR 0xBF /* Power on, full power, not open drain */
27 #define SDI_PWR_PWRCTRL_MASK 0x00000003
28 #define SDI_PWR_PWRCTRL_ON 0x00000003
29 #define SDI_PWR_PWRCTRL_OFF 0x00000000
30 #define SDI_PWR_DAT2DIREN 0x00000004
31 #define SDI_PWR_CMDDIREN 0x00000008
32 #define SDI_PWR_DAT0DIREN 0x00000010
33 #define SDI_PWR_DAT31DIREN 0x00000020
34 #define SDI_PWR_OPD 0x00000040
35 #define SDI_PWR_FBCLKEN 0x00000080
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/
H A Dbcmsrom_tbl.h51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/infineon/bcmdhd/include/
H A Dbcmsrom_tbl.h51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
/OK3568_Linux_fs/external/rkwifibt/drivers/infineon/include/
H A Dbcmsrom_tbl.h51 #define SRFL_CCODE 0x10 /* value is in country code format */
52 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
53 #define SRFL_LEDDC 0x40 /* value is an LED duty cycle */
54 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
55 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
79 {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff},
81 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
83 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
85 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
86 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd/include/
H A Dbcmsrom_tbl.h42 #define SRFL_CCODE 0x10 /* value is in country code format */
43 #define SRFL_ETHADDR 0x20 /* value is an Ethernet address */
44 #define SRFL_UNUSED 0x40 /* unused, was SRFL_LEDDC */
45 #define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */
46 #define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST
70 {"devid", 0xffffff00, SRFL_PRHEX, SROM_DEVID_PCIE, 0xffff},
72 {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff},
74 {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK},
75 {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff},
76 {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff},
[all …]

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