| /rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/ |
| H A D | mt_spm_cond.c | 63 unsigned int reg, val, idx; in is_clkmux_pdn() local
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| /rk3399_ARM-atf/drivers/st/pmic/ |
| H A D | stm32mp_pmic2.c | 470 uint8_t val; in initialize_pmic() local
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| /rk3399_ARM-atf/plat/imx/common/ |
| H A D | imx_sip_handler.c | 171 uint32_t val; in imx_src_handler() local
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| /rk3399_ARM-atf/common/ |
| H A D | fdt_fixup.c | 562 void *val; in fdt_adjust_gic_redist() local
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| /rk3399_ARM-atf/services/std_svc/drtm/ |
| H A D | drtm_main.c | 326 static int drtm_dl_check_features_sanity(uint32_t val) in drtm_dl_check_features_sanity()
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| /rk3399_ARM-atf/drivers/ufs/ |
| H A D | ufs.c | 195 int ufshc_dme_get(unsigned int attr, unsigned int idx, unsigned int *val) in ufshc_dme_get()
228 int ufshc_dme_set(unsigned int attr, unsigned int idx, unsigned int val) in ufshc_dme_set()
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| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_sip_svc.c | 506 uint32_t intel_secure_reg_write(uint64_t reg_addr, uint32_t val,
527 uint32_t val, uint32_t *retval)
824 volatile uint64_t val; local
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| /rk3399_ARM-atf/lib/libfdt/ |
| H A D | fdt_sw.c | 325 int fdt_property(void *fdt, const char *name, const void *val, int len) in fdt_property()
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| /rk3399_ARM-atf/plat/mediatek/include/drivers/pmic/ |
| H A D | pmic_set_lowpower.h | 191 uint8_t mask, uint8_t val) in pmic_spmi_update_bits()
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| /rk3399_ARM-atf/plat/rockchip/rk3368/drivers/soc/ |
| H A D | soc.h | 123 #define REG_VAL_CLRBITS(val, bits_shift, msk) \ argument
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/ |
| H A D | mt_spm_vcorefs.h | 47 uint32_t val; member
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| /rk3399_ARM-atf/plat/rockchip/rk3328/drivers/pmu/ |
| H A D | pmu.c | 218 uint32_t val; in rockchip_soc_system_off() local
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| /rk3399_ARM-atf/drivers/mentor/i2c/ |
| H A D | mi2cv.c | 247 int val; in mentor_i2c_bus_speed_set() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/ |
| H A D | mt_spm_cond.c | 64 unsigned int reg, val, idx; in check_clkmux_pdn() local
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| /rk3399_ARM-atf/plat/rockchip/px30/drivers/pmu/ |
| H A D | pmu.c | 872 uint32_t val = BITS_WITH_WMASK(mode, 0x3, PLL_MODE_SHIFT(pll_id)); in pll_set_mode() local
1009 uint32_t val; in rockchip_soc_system_off() local
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| /rk3399_ARM-atf/drivers/marvell/comphy/ |
| H A D | phy-comphy-3700.c | 263 uint16_t val; in comphy_sgmii_phy_init() local
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| /rk3399_ARM-atf/drivers/scmi-msg/ |
| H A D | sensor.h | 92 struct scmi_sensor_val val; member
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| /rk3399_ARM-atf/include/plat/marvell/odyssey/csr/ |
| H A D | ody-csrs-sam.h | 269 uint64_t val : 1; member
349 uint64_t val : 1; member
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| /rk3399_ARM-atf/plat/hisilicon/hikey/ |
| H A D | hisi_dvfs.c | 85 uint32_t val, uint32_t mask) in write_reg_mask()
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| /rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/ |
| H A D | pm_client.c | 312 uint32_t val; in pm_client_wakeup() local
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| H A D | zynqmp_pm_api_sys.c | 1335 uint32_t val; in pm_clock_setdivider() local
1390 uint32_t val; in pm_clock_getdivider() local
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| /rk3399_ARM-atf/include/drivers/nxp/crypto/caam/ |
| H A D | sec_hw_specific.h | 215 #define SET_JR_REG(name, jr, val) \ argument
218 #define SET_JR_REG_LO(name, jr, val) \ argument
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| /rk3399_ARM-atf/drivers/nxp/clk/s32cc/include/ |
| H A D | s32cc-clk-regs.h | 79 #define MC_CGM_MUXn_CSC_SELCTL(val) (MC_CGM_MUXn_CSC_SELCTL_MASK & ((val) \ argument
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| /rk3399_ARM-atf/plat/intel/soc/agilex5/soc/ |
| H A D | agilex5_iossm_mailbox.c | 26 uint32_t val; in wait_for_bit() local
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| /rk3399_ARM-atf/drivers/arm/mhu/ |
| H A D | mhu_v2_x.c | 209 uint32_t channel, uint32_t val) in mhu_v2_x_channel_send()
|