| #
9554a186 |
| 10-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "a3700-comphy-fixes-1" into integration
* changes: refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants refactor(drivers/marvell/comphy-3700):
Merge changes from topic "a3700-comphy-fixes-1" into integration
* changes: refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants refactor(drivers/marvell/comphy-3700): rename Clock Source Low register constants refactor(drivers/marvell/comphy-3700): rename Reset and Clock Control register constants refactor(drivers/marvell/comphy-3700): rename Lane Status 1 register constants refactor(drivers/marvell/comphy-3700): rename Miscellaneous Control register constants refactor(drivers/marvell/comphy-3700): rename Idle Sync Enable register constants refactor(drivers/marvell/comphy-3700): unify Generation Settings register values refactor(drivers/marvell/comphy-3700): unify Generation Settings register names refactor(drivers/marvell/comphy-3700): drop _ADDR suffixes refactor(drivers/marvell/comphy-3700): drop _REG prefixes and suffixes refactor(drivers/marvell/comphy-3700): move and add comment for COMPHY_RESERVED_REG refactor(drivers/marvell/comphy-3700): move Miscellaneous Control 0 register definition refactor(drivers/marvell/comphy-3700): rename PHY_GEN_USB3_5G to PHY_GEN_MAX_USB3_5G refactor(drivers/marvell/comphy-3700): rename Digital Loopback Enable register constant fix(drivers/marvell/comphy): change reg_set() / reg_set16() to update semantics fix(drivers/marvell/comphy-3700): use reg_set() according to update semantics fix(drivers/marvell/comphy-3700): fix comments about selector register values fix(drivers/marvell/comphy-3700): fix comment about COMPHY status register fix(drivers/marvell/comphy-3700): fix reference clock selection value names fix(drivers/marvell/comphy-3700): drop MODE_REFDIV constant fix(drivers/marvell/comphy-3700): fix SerDes frequency register value name fix(drivers/marvell/comphy-3700): fix Generation Setting registers names fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name
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| #
e62ae2e2 |
| 08-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants
The constants BUNDLE_PERIOD_SCALE and PLL_READY_DLY refer to two multi-bit registers within the Clock Source Low regist
refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants
The constants BUNDLE_PERIOD_SCALE and PLL_READY_DLY refer to two multi-bit registers within the Clock Source Low register. These constants are used as masks for those registers (and values are not defined since we are writing zeros to them).
Give them the _MASK suffix.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Id469d0ab4c755d2d6a0150a1ade33dd9d0293667
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| #
e585c84c |
| 08-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Clock Source Low register constants
The register at offset 0x1C3 is called Clock Source Low in functional specification, but we use constant name GLOB_C
refactor(drivers/marvell/comphy-3700): rename Clock Source Low register constants
The register at offset 0x1C3 is called Clock Source Low in functional specification, but we use constant name GLOB_CLK_SRC_LO. Rename it to RST_CLK_CTRL instead.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: If7ca460cb166f3828678e1e09c4e6caf5bb77770
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| #
6a14ac78 |
| 08-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Reset and Clock Control register constants
The register at offset 0x1C1 is called Reset and Clock Control in functional specification, but we use consta
refactor(drivers/marvell/comphy-3700): rename Reset and Clock Control register constants
The register at offset 0x1C1 is called Reset and Clock Control in functional specification, but we use constant name GLOB_PHY_CTRL0. Rename it to RST_CLK_CTRL instead.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I5dac8913bd0686d4f5bd74b91cb7d07ba06df72b
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| #
6eb04379 |
| 08-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Lane Status 1 register constants
Rename the Lane Status 1 register constants from LANE_STATUS1 to LANE_STAT1, to use an abbreviation similar to that for
refactor(drivers/marvell/comphy-3700): rename Lane Status 1 register constants
Rename the Lane Status 1 register constants from LANE_STATUS1 to LANE_STAT1, to use an abbreviation similar to that for Lane Configuration registers (where we use LANE_CFGx instead of LANE_CONFIGx or LANE_CONFIGURATIONx).
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Ie329d5a93615efe261802a2f027475b602a5c840
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| #
9cf978c6 |
| 08-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Miscellaneous Control register constants
Rename the Miscellaneous Control register constants from MISC_REGx to MISC_CTRLx.
Signed-off-by: Marek Behún <
refactor(drivers/marvell/comphy-3700): rename Miscellaneous Control register constants
Rename the Miscellaneous Control register constants from MISC_REGx to MISC_CTRLx.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I4d43bbda44b090de4ecf2d52cfc468f9683cc3b5
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| #
86f6b55d |
| 07-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Idle Sync Enable register constants
According to the functional specification, the register at offset 0x48 is called Idle Sync Enable, not Unit Control
refactor(drivers/marvell/comphy-3700): rename Idle Sync Enable register constants
According to the functional specification, the register at offset 0x48 is called Idle Sync Enable, not Unit Control or some such.
Rename the constants.
Only bit 12 of this register is defined, all other bits are reserved. But for some reason the code needs the default value of the other bits, so we also rename constant UNIT_CTRL_DEFAULT_VALUE to IDLE_SYNC_EN_DEFAULT_VALUE.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Ia4f80f945a8f31c190cd9a1875d50d892e72825f
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| #
3f9a0892 |
| 08-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): unify Generation Settings register values
Generation Settings registers have the same layout for different generations and same setting (i.e. Generation 2 Sett
refactor(drivers/marvell/comphy-3700): unify Generation Settings register values
Generation Settings registers have the same layout for different generations and same setting (i.e. Generation 2 Settings 2 register has the same layout as Generation 3 Settings 2).
So it does not make sense to prefix the constants for Settings 2 with G3.
Instead change the prefixes to GSx_ for settings register x.
For Settings 2 of Gen 2 and Gen 3 we have some definitions in the first and some in the second. Move them all to the first defined register (in this case Gen 2, since the constant for Gen 1 is not defined because it is not used).
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I15c337eb58aa37fd99fe388fd59373aa325a3a92
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| #
30264e97 |
| 07-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): unify Generation Settings register names
Sometimes we call the constants GENx_SET_y, sometimes GENx_SETTINGS_y, and sometimes GENx_SETTING_y.
Unify this into
refactor(drivers/marvell/comphy-3700): unify Generation Settings register names
Sometimes we call the constants GENx_SET_y, sometimes GENx_SETTINGS_y, and sometimes GENx_SETTING_y.
Unify this into GENx_SETy.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I3810fb52b2897fe6730ef6e58d434c47cfef14a9
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| #
b7b0575d |
| 07-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): drop _ADDR suffixes
COMPHY register addresses are defined twice - once for indirect access, where the constants are of the form COMPHY_<register_name> - once
refactor(drivers/marvell/comphy-3700): drop _ADDR suffixes
COMPHY register addresses are defined twice - once for indirect access, where the constants are of the form COMPHY_<register_name> - once for direct access, with constants of the form <register_name>_ADDR
But sometimes the first case also has this _ADDR suffix (and other times not).
Drop it from those places to unify how we define these registers.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Ibf95be8ade231d0e42258f40614a5f0974d280bd
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| #
b3491336 |
| 07-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): drop _REG prefixes and suffixes
Some register constants are defined with _REG suffix or REG_ prefix, but others are not. Unify this by dropping these prefixes
refactor(drivers/marvell/comphy-3700): drop _REG prefixes and suffixes
Some register constants are defined with _REG suffix or REG_ prefix, but others are not. Unify this by dropping these prefixes / suffixes.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I1ba331c0a4686093ee250bcaf3297349956ac9a8
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| #
669d3dc5 |
| 01-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename PHY_GEN_USB3_5G to PHY_GEN_MAX_USB3_5G
The register name for the value PHY_GEN_USB3_5G is PHY_GEN_MAX. We already define the mask constant as PHY_GEN_MA
refactor(drivers/marvell/comphy-3700): rename PHY_GEN_USB3_5G to PHY_GEN_MAX_USB3_5G
The register name for the value PHY_GEN_USB3_5G is PHY_GEN_MAX. We already define the mask constant as PHY_GEN_MAX_MASK. Thus also the value name should be prefixed with PHY_GEN_MAX_.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Ibf72a66d2e65e240ed2cdbc3a301dbd793e2cb34
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| #
4c995d2d |
| 07-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
refactor(drivers/marvell/comphy-3700): rename Digital Loopback Enable register constant
The register at offset 0x23 is called Digital Loopback Enable, but the constant is COMPHY_LOOPBACK_REG0, as if
refactor(drivers/marvell/comphy-3700): rename Digital Loopback Enable register constant
The register at offset 0x23 is called Digital Loopback Enable, but the constant is COMPHY_LOOPBACK_REG0, as if there were some LOOPBACK_REG1 register or something, which there is not.
Rename the constant to COMPHY_DIG_LOOPBACK_EN.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Ie88bdd864e2c9ab7e8de70ed7f3a13ee8f08ff79
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| #
4d01bfe6 |
| 01-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
fix(drivers/marvell/comphy-3700): use reg_set() according to update semantics
Currently reg_set() and reg_set16() are almost everywhere (both in phy-comphy-3700.c and phy-comphy-cp110.c) used as if
fix(drivers/marvell/comphy-3700): use reg_set() according to update semantics
Currently reg_set() and reg_set16() are almost everywhere (both in phy-comphy-3700.c and phy-comphy-cp110.c) used as if the semantics were that of register update function (only bits that are set in mask are updated): reg_set(addr, data, mask) { *addr = (*addr & ~mask) | (data & mask); }
This comes both from names of arguments (data and mask), and from usage.
But both functions are in fact implemented via mmio_clrsetbits_32(), so they actually first clear bits from mask and then set bits from data: reg_set(addr, data, mask) { *addr = (*addr & ~mask) | data; }
There are only two places where this is leveraged (where some bits are put into data argument but they are not put into the mask argument).
Fix those two usages to allow to convert the implementation from clrsetbits semantics to update semantics.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Ib29a1dd7edcdee7a39c4752dbc9dfcd600d8cb5c
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| #
6ba97f83 |
| 01-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
fix(drivers/marvell/comphy-3700): fix reference clock selection value names
The current definitions of reference clock speed register values #define PCIE_REF_CLOCK_SPEED_25M REF_CLOCK_SPEED_
fix(drivers/marvell/comphy-3700): fix reference clock selection value names
The current definitions of reference clock speed register values #define PCIE_REF_CLOCK_SPEED_25M REF_CLOCK_SPEED_30M #define USB3_REF_CLOCK_SPEED_25M REF_CLOCK_SPEED_30M is ambiguous. The name of the constant implies 25 MHz, but the value implies 30 MHz, which may make the reader think that the setting has something to do with both values.
In reality, the values have different tables for SerDes and PCIe/USB3 PHY mode. The value for 25 MHz for PCIe/USB3 mode (0x2) is the value for 30 MHz for SerDes mode.
Instead of defining the PCIe/USB3 constants relative to SerDes constants, define them with absolute values, thus making it a little bit more obvious that different modes have different value tables.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I50c66c6bbe22b9a9bec4685600cb8560524a643c
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| #
9fdecc72 |
| 01-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
fix(drivers/marvell/comphy-3700): drop MODE_REFDIV constant
The MODE_REFDIV constant is only used as mask of the MODE_REFDIV register, but we already have MODE_REFDIV_MASK constant for that.
Drop M
fix(drivers/marvell/comphy-3700): drop MODE_REFDIV constant
The MODE_REFDIV constant is only used as mask of the MODE_REFDIV register, but we already have MODE_REFDIV_MASK constant for that.
Drop MODE_REFDIV.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: Icabb32189a7ca1a857dcf86cf0846bd0335f75d0
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| #
bdcf44f1 |
| 01-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
fix(drivers/marvell/comphy-3700): fix SerDes frequency register value name
Constants SD_SPEED_1_25_G and SD_SPEED_2_5_G refer to SerDes frequency, which is 1.25x that of data rate, since 1000base-x
fix(drivers/marvell/comphy-3700): fix SerDes frequency register value name
Constants SD_SPEED_1_25_G and SD_SPEED_2_5_G refer to SerDes frequency, which is 1.25x that of data rate, since 1000base-x and 2500base-x use the 8b/10b encoding:
mode frequency data rate 1000base-x 1.25 GHz 1 Gbps 2500base-x 3.125 GHz 2.5 Gbps
But the first constant refers to the frequency, while the second to the data rate, which does not make sense.
Since the values in the specification refer to frequency, change the name of the constant SD_SPEED_2_5_G to SD_SPEED_3_125_G to also refer to the frequency, as SD_SPEED_1_25_G does.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I7670b45fa685aff93b3cafd84cf30d93620d8da1
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| #
e5a2aac5 |
| 01-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
fix(drivers/marvell/comphy-3700): fix Generation Setting registers names
According to Functional Specification, the common PHY register at offset 0x3f is actually Generation 3 Setting 2, while the r
fix(drivers/marvell/comphy-3700): fix Generation Setting registers names
According to Functional Specification, the common PHY register at offset 0x3f is actually Generation 3 Setting 2, while the register at offset 0x112 is Generation 2 Setting 3.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I4626672cbee2d08da1da7839a3cf3f90e78fa101
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| #
c9f138eb |
| 07-Dec-2021 |
Marek Behún <marek.behun@nic.cz> |
fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name
According to Functional Specification, the register at bit 1 of PHY Configuration 1 is called PIN_PU_IVREF, not PIN_PU_IVEREF. Fix th
fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name
According to Functional Specification, the register at bit 1 of PHY Configuration 1 is called PIN_PU_IVREF, not PIN_PU_IVEREF. Fix this.
Signed-off-by: Marek Behún <marek.behun@nic.cz> Change-Id: I912fa4a1956bf0b1b35a24925db03e3dbbe1adf3
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| #
68d8d3e7 |
| 14-Oct-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe" into integration
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| #
0f3a1221 |
| 12-Oct-2021 |
Pali Rohár <pali@kernel.org> |
fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe
The mvebu_a3700_comphy_pcie_power_on() function does not configure the PHY selector explicitly, it relies on the register defau
fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe
The mvebu_a3700_comphy_pcie_power_on() function does not configure the PHY selector explicitly, it relies on the register default value.
Configure the PHY selector just in case someone changed the default value.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I54048b4bb7a5eced36f7fe6592ebe108f978fff0
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| #
6acaba62 |
| 04-Oct-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes I16cac81b,I6c709c0c,I69581714,I018d158f,I23146f56, ... into integration
* changes: fix(drivers/marvell/comphy-cp110): fix error code in pcie power on fix(drivers/marvell/comphy-370
Merge changes I16cac81b,I6c709c0c,I69581714,I018d158f,I23146f56, ... into integration
* changes: fix(drivers/marvell/comphy-cp110): fix error code in pcie power on fix(drivers/marvell/comphy-3700): handle failures in power functions fix(drivers/marvell/comphy-3700): fix address overflow refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init() refactor(drivers/marvell/comphy-3700): simplify usage of indirect access on lane2 refactor(drivers/marvell/comphy-3700): simplify usage of sata power off
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| #
49b664e7 |
| 23-Sep-2021 |
Pali Rohár <pali@kernel.org> |
fix(drivers/marvell/comphy-3700): handle failures in power functions
Subroutines in power functions may fail. So propagate failures from subroutines back to the caller of power function with appropr
fix(drivers/marvell/comphy-3700): handle failures in power functions
Subroutines in power functions may fail. So propagate failures from subroutines back to the caller of power function with appropriate error code in return value.
Function polling_with_timeout() returns last value from polled register on failure and zero on success. So return -ETIMEDOUT on error from power functions like it is doing Marvell comphy-cp110 driver.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I6c709c0c9616ab26829616a42a85b713f314b201
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| #
c074f70c |
| 23-Sep-2021 |
Pali Rohár <pali@kernel.org> |
fix(drivers/marvell/comphy-3700): fix address overflow
Physical address has to be stored in 64-bit data type as Armada 3720 is 64-bit platform. Driver already uses uintptr_t type for this purpise.
fix(drivers/marvell/comphy-3700): fix address overflow
Physical address has to be stored in 64-bit data type as Armada 3720 is 64-bit platform. Driver already uses uintptr_t type for this purpise.
Change type of 'offset' variables in mvebu_a3700_comphy_usb3_power_on() and mvebu_a3700_comphy_sgmii_power_on() / off() functions to uintptr_t as in this variable is stored physical address of registers.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I69581714f8899d21cc1a27005747708f0f1cd933
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| #
0694b813 |
| 23-Sep-2021 |
Pali Rohár <pali@kernel.org> |
refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init()
Parameter 'comphy_index' is not used and parameter 'mode' is used only to check if speed is 1 Gbps or not.
Remove pa
refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init()
Parameter 'comphy_index' is not used and parameter 'mode' is used only to check if speed is 1 Gbps or not.
Remove parameter 'comphy_index' and instead of 32-bit variable 'mode', pass only boolean value which represents 1 Gbps speed.
Signed-off-by: Pali Rohár <pali@kernel.org> Change-Id: I018d158f689ddf7d1f57003717d709c00d988fba
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