| #
047b1b9a |
| 14-Oct-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_remove_abort_suspend" into integration
* changes: fix(versal-net): remove client-side code of PM_ABORT_SUSPEND fix(versal): remove client-side implementation of PM
Merge changes from topic "xlnx_remove_abort_suspend" into integration
* changes: fix(versal-net): remove client-side code of PM_ABORT_SUSPEND fix(versal): remove client-side implementation of PM_ABORT_SUSPEND fix(xilinx): remove PM_ABORT_SUSPEND API implementation fix(zynqmp): remove PM_ABORT_SUSPEND API implementation fix(versal2): remove PM_ABORT_SUSPEND API implementation
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| #
c069c8ef |
| 02-Oct-2025 |
Madhav Bhatt <madhav.bhatt@amd.com> |
fix(zynqmp): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Change-Id: Iac7a651273401b6737c92ad26cb5
fix(zynqmp): remove PM_ABORT_SUSPEND API implementation
The API is not getting called by Linux. Removing it to reduce dead code and improve maintainability.
Change-Id: Iac7a651273401b6737c92ad26cb5f990b512889b Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>
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| #
0c0b19f4 |
| 07-Oct-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_enhancement_on_secure_and_non_secure_flag" into integration
* changes: feat(xilinx): use common SECURE/NON_SECURE macro fix(xilinx): incorrect usage of SECURE_FLAG
Merge changes from topic "xlnx_enhancement_on_secure_and_non_secure_flag" into integration
* changes: feat(xilinx): use common SECURE/NON_SECURE macro fix(xilinx): incorrect usage of SECURE_FLAG for psci
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| #
4fd510e0 |
| 02-Sep-2025 |
Ronak Jain <ronak.jain@amd.com> |
feat(xilinx): use common SECURE/NON_SECURE macro
Remove platform-specific macro definitions such as SECURE_FLAG and NON_SECURE_FLAG, and replace them with the common macros SECURE and NON_SECURE acr
feat(xilinx): use common SECURE/NON_SECURE macro
Remove platform-specific macro definitions such as SECURE_FLAG and NON_SECURE_FLAG, and replace them with the common macros SECURE and NON_SECURE across all AMD-Xilinx platforms.
Change-Id: I95465e29ac8a9370da135c2113203c3206ecfec0 Signed-off-by: Ronak Jain <ronak.jain@amd.com>
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| #
c48c11e7 |
| 05-Sep-2025 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes I5fcf6578,Ic7792603 into integration
* changes: fix(xilinx): fix missing security flag in suspend path feat(zynqmp): mark IPI calls secure/non-secure
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| #
5cac1d85 |
| 20-Aug-2025 |
Ronak Jain <ronak.jain@amd.com> |
fix(xilinx): fix missing security flag in suspend path
Suspend flow was always programming wakeup sources with a fixed secure flag, regardless of whether the caller was secure or non-secure. This ma
fix(xilinx): fix missing security flag in suspend path
Suspend flow was always programming wakeup sources with a fixed secure flag, regardless of whether the caller was secure or non-secure. This may cause incorrect behavior for non-secure suspend requests.
Fix this by passing the caller's security state (flag) through pm_client_suspend() and pm_client_set_wakeup_sources() to ensure that wakeup sources are set with the correct context.
Fixes: <4697164a3fa8> ("plat: xilinx: versal: Mark IPI calls secure/non-secure")
Change-Id: I5fcf65788a54010b4759b0d08e4f54c6e5037e47 Signed-off-by: Ronak Jain <ronak.jain@amd.com>
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| #
8ce93ec9 |
| 28-Jul-2025 |
Ronak Jain <ronak.jain@amd.com> |
feat(zynqmp): mark IPI calls secure/non-secure
Use BIT24 of the IPI command header from payload[0] to identify the caller's security state. If the SMC caller is non-secure, set BIT24 to indicate a n
feat(zynqmp): mark IPI calls secure/non-secure
Use BIT24 of the IPI command header from payload[0] to identify the caller's security state. If the SMC caller is non-secure, set BIT24 to indicate a non-secure origin.
The mechanism is already present in Versal, Versal NET, and Versal Gen 2 platforms. Extend the same support to Zynq UltraScale+ MPSoC (ZU+) to align its behavior with newer SoCs.
Change-Id: Ic77926033e76a53c0fa1a9949e6838ec64bd6ae5 Signed-off-by: Ronak Jain <ronak.jain@amd.com>
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| #
fffde230 |
| 23-Jan-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge changes from topic "xlnx_fix_plat_single_ret" into integration
* changes: fix(versal2): modify function to have single return fix(versal-net): modify function to have single return fix(v
Merge changes from topic "xlnx_fix_plat_single_ret" into integration
* changes: fix(versal2): modify function to have single return fix(versal-net): modify function to have single return fix(versal): modify function to have single return fix(xilinx): modify function to have single return fix(zynqmp): modify function to have single return fix(versal-net): add unsigned suffix to match data type fix(versal): add unsigned suffix to match data type fix(versal2): add missing curly braces fix(versal-net): add missing curly braces fix(zynqmp): add missing curly braces
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| #
3f6d4794 |
| 04-Nov-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): modify function to have single return
This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store th
fix(zynqmp): modify function to have single return
This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store the return value to ensure single return for the function.
Change-Id: Ibff3df16b4c591384467771bc7cb316f1773f1ea Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
9ef62bd8 |
| 23-Dec-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_data_types" into integration
* changes: fix(versal2): typecast operands to match data type fix(versal): typecast operands to match data type fix(versal-
Merge changes from topic "xlnx_fix_plat_data_types" into integration
* changes: fix(versal2): typecast operands to match data type fix(versal): typecast operands to match data type fix(versal-net): typecast operands to match data type fix(xilinx): typecast operands to match data type fix(zynqmp): typecast operands to match data type fix(versal-net): typecast operands to match data type fix(versal): typecast operands to match data type fix(xilinx): typecast operands to match data type fix(zynqmp): typecast operands to match data type fix(versal2): typecast expressions to match data type fix(versal-net): typecast expressions to match data type fix(versal): typecast expressions to match data type fix(xilinx): typecast expressions to match data type fix(zynqmp): typecast expressions to match data type fix(zynqmp): align essential type categories fix(zynqmp): typecast expression to match data type fix(xilinx): typecast expression to match data type
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| #
6ae95624 |
| 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a d
fix(zynqmp): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I141fbc554265173df0ca90c2ddc7f28137c6b0f1 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
2863b0c4 |
| 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): typecast operands to match data type
This corrects the MISRA violation C2012-10.1: Operands shall not be of an inappropriate essential type. The condition is explicitly checked against
fix(zynqmp): typecast operands to match data type
This corrects the MISRA violation C2012-10.1: Operands shall not be of an inappropriate essential type. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I016f9df3811d80cd230257b5533d4d15a15fe14f Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
895e8029 |
| 23-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): typecast expressions to match data type
This corrects the MISRA violation C2012-10.4: Both operands of an operator in which the usual arithmetic conversions are performed shall have the
fix(zynqmp): typecast expressions to match data type
This corrects the MISRA violation C2012-10.4: Both operands of an operator in which the usual arithmetic conversions are performed shall have the same essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
Change-Id: I847af07f5e4f139384c1ed50bee765b892a6e9cd Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
a9fdd198 |
| 06-Nov-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration
* changes: fix(versal2): variable conflicting with external linkage fix(versal-net): variable conflicting with external l
Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration
* changes: fix(versal2): variable conflicting with external linkage fix(versal-net): variable conflicting with external linkage fix(versal): variable conflicting with external linkage fix(zynqmp): variable conflicting with external linkage fix(versal2): add external declaration fix(versal): add external declaration fix(zynqmp): add external declaration
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| #
eda23fa5 |
| 08-Oct-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): variable conflicting with external linkage
This corrects the MISRA violation C2012-5.8: Identifiers that define objects or functions with external linkage shall be unique. Modify the va
fix(zynqmp): variable conflicting with external linkage
This corrects the MISRA violation C2012-5.8: Identifiers that define objects or functions with external linkage shall be unique. Modify the variable name to prevent conflict with external object linkage.
Change-Id: I32bed542c4810508174029ab0aaec18bcdf849a5 Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
dddded14 |
| 01-Nov-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_boolc_fn_ret" into integration
* changes: fix(xilinx): avoid altering function parameters fix(versal-net): ignore the unused function return value fix(z
Merge changes from topic "xlnx_fix_plat_boolc_fn_ret" into integration
* changes: fix(xilinx): avoid altering function parameters fix(versal-net): ignore the unused function return value fix(zynqmp): ignore the unused function return value fix(versal-net): modify conditions to have boolean type fix(versal): modify conditions to have boolean type fix(xilinx): modify conditions to have boolean type fix(zynqmp): modify conditions to have boolean type
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| #
a42e6e44 |
| 22-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): modify conditions to have boolean type
This corrects the MISRA violation C2012-14.4: The controlling expression of an if statement and the controlling expression of an iteration-stateme
fix(zynqmp): modify conditions to have boolean type
This corrects the MISRA violation C2012-14.4: The controlling expression of an if statement and the controlling expression of an iteration-statement shall have essentially boolean type. Updated controlling expression to explicitly compare with zero.
Change-Id: I5bf7070db9bced50f5d37a3d9406301585930b50 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
a539dce9 |
| 29-Oct-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_plat_const_preced" into integration
* changes: fix(versal2): explicitly check operators precedence fix(versal-net): explicitly check operators precedence fix
Merge changes from topic "xlnx_fix_plat_const_preced" into integration
* changes: fix(versal2): explicitly check operators precedence fix(versal-net): explicitly check operators precedence fix(versal): explicitly check operators precedence fix(xilinx): explicitly check operators precedence fix(zynqmp): explicitly check operators precedence fix(versal2): add const qualifier fix(versal): add const qualifier fix(zynqmp): add const qualifier
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| #
5b542313 |
| 22-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): explicitly check operators precedence
This corrects the MISRA violation C2012-12.1: The precedence of operators within expressions should be made explicit. Enclosed the subexpression in
fix(zynqmp): explicitly check operators precedence
This corrects the MISRA violation C2012-12.1: The precedence of operators within expressions should be made explicit. Enclosed the subexpression in parentheses to maintain the precedence.
Change-Id: Id8b901634580bf64cc5022372ba385626f342246 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
f1feb9a5 |
| 18-Oct-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_eval_bool" into integration
* changes: fix(versal_net): evaluate condition for boolean fix(versal): evaluate condition for boolean fix(zynqmp): evaluate cond
Merge changes from topic "xlnx_fix_eval_bool" into integration
* changes: fix(versal_net): evaluate condition for boolean fix(versal): evaluate condition for boolean fix(zynqmp): evaluate condition for boolean fix(xilinx): rename variable to avoid conflict
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| #
aaf6e762 |
| 19-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(zynqmp): evaluate condition for boolean
This corrects the MISRA violation C2012-11.9: The macro NULL shall be the only permitted form of integer null pointer constant. The condition is compared
fix(zynqmp): evaluate condition for boolean
This corrects the MISRA violation C2012-11.9: The macro NULL shall be the only permitted form of integer null pointer constant. The condition is compared with NULL to get boolean result.
Change-Id: I6350e2c03fdb3175deb232f28f0dfce009563eb1 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| #
ebc9ddba |
| 07-Oct-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_fix_unused_param" into integration
* changes: fix(versal2): declare unused parameters as void fix(versal-net): declare unused parameters as void fix(versal): dec
Merge changes from topic "xlnx_fix_unused_param" into integration
* changes: fix(versal2): declare unused parameters as void fix(versal-net): declare unused parameters as void fix(versal): declare unused parameters as void fix(xilinx): declare unused parameters as void fix(zynqmp): declare unused parameters as void
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| #
1c43e36a |
| 18-Apr-2024 |
Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com> |
fix(zynqmp): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id
fix(zynqmp): declare unused parameters as void
This corrects the MISRA violation C2012-2.7: There should be no unused parameters in functions. Declared unused function parameters as void.
Change-Id: I435dbcbe1c4aad7c69eb49599cd0dbca0677150d Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <MaheedharSai.Bollapalli@amd.com>
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| #
778e2452 |
| 12-Aug-2024 |
Joanna Farley <joanna.farley@arm.com> |
Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration
* changes: docs(xilinx): update SMC documentation in TF-A feat(xilinx): add feature check function for TF-A specific
Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration
* changes: docs(xilinx): update SMC documentation in TF-A feat(xilinx): add feature check function for TF-A specific APIs feat(xilinx): update SiP SVC version number feat(xilinx): update TF-A to passthrough all PLM commands fix(xilinx): fix logic to read ipi response
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| #
03fa6f42 |
| 24-Jun-2024 |
Jay Buddhabhatti <jay.buddhabhatti@amd.com> |
fix(xilinx): fix logic to read ipi response
Currently, PLM IPI command supports total 8 32-bit payloads. But existing logic to read IPI response in TF-A is trying to read 9 32-bit payloads (ret stat
fix(xilinx): fix logic to read ipi response
Currently, PLM IPI command supports total 8 32-bit payloads. But existing logic to read IPI response in TF-A is trying to read 9 32-bit payloads (ret status + 8 ret payloads) in case of IPI_CRC_CHECK enabled which is incorrect.
So, fix logic to read only 8 32-bit payloads (ret status + 6 ret payloads + CRC) in case when IPI_CRC_CHECK is enabled and read 7 32-bit payloads (ret status + 5 ret payloads + CRC) in case when IPI_CRC_CHECK is disabled.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com> Change-Id: I0abca2f787cc7a66fdd5522e6bd15a9771029071
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