| /rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/constraints/ |
| H A D | mt_spm_rc_bus26m.c | 152 int spm_update_rc_bus26m(int state_id, int type, const void *val) in spm_update_rc_bus26m()
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| /rk3399_ARM-atf/plat/mediatek/include/lpm/ |
| H A D | mt_lp_api.h | 42 struct mt_lpm_pubevent_data val; member
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| /rk3399_ARM-atf/bl1/ |
| H A D | bl1_main.c | 87 u_register_t val; in PMF_REGISTER_SERVICE() local
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| /rk3399_ARM-atf/include/lib/ |
| H A D | utils_def.h | 94 #define UPDATE_REG_FIELD(regfield, reg, val) \ argument
109 #define div_round_up(val, div) __extension__ ({ \ argument
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| /rk3399_ARM-atf/include/lib/el3_runtime/aarch64/ |
| H A D | context.h | 267 #define write_ctx_reg(ctx, offset, val) (((ctx)->ctx_regs[(offset) >> DWORD_SHIFT]) \ argument
438 static inline void write_ctx_sctlr_el1_reg_errata(cpu_context_t *ctx, u_register_t val) in write_ctx_sctlr_el1_reg_errata()
448 static inline void write_ctx_tcr_el1_reg_errata(cpu_context_t *ctx, u_register_t val) in write_ctx_tcr_el1_reg_errata()
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| /rk3399_ARM-atf/plat/marvell/armada/a3k/common/ |
| H A D | cm3_system_reset.c | 49 uint32_t val; in a3700_gicd_ctlr_clear_bits() local
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| /rk3399_ARM-atf/plat/nvidia/tegra/drivers/memctrl/ |
| H A D | memctrl_v2.c | 177 uint64_t val; in tegra_lock_videomem_nonoverlap() local
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| /rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/ |
| H A D | mt_spm_vcorefs.c | 359 static void spm_vcorefs_pwarp_cmd(uint64_t cmd, uint64_t val) in spm_vcorefs_pwarp_cmd()
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/constraints/ |
| H A D | mt_spm_rc_bus26m.c | 101 int spm_update_rc_bus26m(int state_id, int type, const void *val) in spm_update_rc_bus26m()
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/dfd/ |
| H A D | plat_dfd.h | 14 #define sync_writel(addr, val) do { mmio_write_32((addr), (val)); \ argument
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| /rk3399_ARM-atf/plat/renesas/common/ |
| H A D | bl2_cpg_init.c | 48 uint32_t val; member
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| /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/ |
| H A D | spm.c | 230 uint32_t val, mask, isr; in spm_set_wakeup_event() local
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| /rk3399_ARM-atf/plat/mediatek/drivers/gicv3/ |
| H A D | mt_gic_v3.c | 51 uint32_t val; in mt_irq_get_pending() local
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| /rk3399_ARM-atf/drivers/arm/gic/v3/ |
| H A D | gic-x00.c | 51 static void gicr_write_pwrr(uintptr_t base, unsigned int val) in gicr_write_pwrr()
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| H A D | gicrv3_helpers.c | 29 void gicr_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val) in gicr_write_ipriorityr()
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| /rk3399_ARM-atf/drivers/nxp/ddr/nxp-ddr/ |
| H A D | utility.c | 110 uint32_t val, nodeid; in disable_unused_ddrc() local
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| H A D | ddrc.c | 151 unsigned long val; in dump_ddrc() local
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| /rk3399_ARM-atf/include/bl31/ |
| H A D | interrupt_mgmt.h | 78 #define set_interrupt_src_ss(flag, val) ((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT) argument
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| /rk3399_ARM-atf/plat/nxp/soc-ls1046a/ |
| H A D | soc.c | 237 uint32_t rcw_src, val; in get_boot_dev() local
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| /rk3399_ARM-atf/plat/imx/imx8m/imx8mq/ |
| H A D | imx8mq_bl31_setup.c | 133 unsigned int val; in bl31_tz380_setup() local
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| /rk3399_ARM-atf/plat/mediatek/mt8173/ |
| H A D | plat_pm.c | 128 uint64_t val; in mt_save_generic_timer() local
155 uint64_t val; in mt_restore_generic_timer() local
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| /rk3399_ARM-atf/drivers/st/pmic/ |
| H A D | stpmic1.c | 672 uint8_t val; in stpmic1_is_regulator_enabled() local
892 uint8_t val; in stpmic1_register_update() local
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| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | clk-stm32-core.c | 239 unsigned int val) in _get_table_div()
253 unsigned int val, unsigned long flags, in _get_div()
731 uint32_t val = 0; in clk_stm32_div_get_value() local
744 uint32_t val = clk_stm32_div_get_value(priv, div_id); in _clk_stm32_divider_recalc() local
1078 uint32_t val = fdt32_to_cpu(cell[i]); in stm32_clk_parse_fdt_by_name() local
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/ |
| H A D | mt_spm_internal.c | 354 uint32_t val, mask; in __spm_set_wakeup_event() local
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/drivers/se/ |
| H A D | se_private.h | 95 static inline void tegra_se_write_32(uint32_t offset, uint32_t val) in tegra_se_write_32()
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