xref: /rk3399_ARM-atf/include/bl31/interrupt_mgmt.h (revision ee37db50c018e6f590e795a9f3537f37aa026f33)
1e1333f75SAchin Gupta /*
213b62814SBoyan Karatotev  * Copyright (c) 2014-2024, Arm Limited and Contributors. All rights reserved.
3e1333f75SAchin Gupta  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
5e1333f75SAchin Gupta  */
6e1333f75SAchin Gupta 
7c3cf06f1SAntonio Nino Diaz #ifndef INTERRUPT_MGMT_H
8c3cf06f1SAntonio Nino Diaz #define INTERRUPT_MGMT_H
9e1333f75SAchin Gupta 
10e1333f75SAchin Gupta #include <arch.h>
1109d40e0eSAntonio Nino Diaz #include <lib/utils_def.h>
12e1333f75SAchin Gupta 
13e1333f75SAchin Gupta /*******************************************************************************
14e1333f75SAchin Gupta  * Constants for the types of interrupts recognised by the IM framework
15e1333f75SAchin Gupta  ******************************************************************************/
16030567e6SVarun Wadekar #define INTR_TYPE_S_EL1			U(0)
17030567e6SVarun Wadekar #define INTR_TYPE_EL3			U(1)
18030567e6SVarun Wadekar #define INTR_TYPE_NS			U(2)
1913b62814SBoyan Karatotev #define INTR_TYPE_RL			U(3)
2013b62814SBoyan Karatotev #define MAX_INTR_TYPES			U(4)
21e1333f75SAchin Gupta #define INTR_TYPE_INVAL			MAX_INTR_TYPES
22fc529feeSJeenu Viswambharan 
23fc529feeSJeenu Viswambharan /* Interrupt routing modes */
24fc529feeSJeenu Viswambharan #define INTR_ROUTING_MODE_PE		0
25fc529feeSJeenu Viswambharan #define INTR_ROUTING_MODE_ANY		1
26fc529feeSJeenu Viswambharan 
27e1333f75SAchin Gupta /*
28e1333f75SAchin Gupta  * Constant passed to the interrupt handler in the 'id' field when the
29e1333f75SAchin Gupta  * framework does not read the gic registers to determine the interrupt id.
30e1333f75SAchin Gupta  */
31030567e6SVarun Wadekar #define INTR_ID_UNAVAILABLE		U(0xFFFFFFFF)
32e1333f75SAchin Gupta 
33e1333f75SAchin Gupta 
34e1333f75SAchin Gupta /*******************************************************************************
35e1333f75SAchin Gupta  * Mask for _both_ the routing model bits in the 'flags' parameter and
36e1333f75SAchin Gupta  * constants to define the valid routing models for each supported interrupt
37e1333f75SAchin Gupta  * type
38e1333f75SAchin Gupta  ******************************************************************************/
39030567e6SVarun Wadekar #define INTR_RM_FLAGS_SHIFT		U(0x0)
40030567e6SVarun Wadekar #define INTR_RM_FLAGS_MASK		U(0x3)
41e1333f75SAchin Gupta /* Routed to EL3 from NS. Taken to S-EL1 from Secure */
42030567e6SVarun Wadekar #define INTR_SEL1_VALID_RM0		U(0x2)
43e1333f75SAchin Gupta /* Routed to EL3 from NS and Secure */
44030567e6SVarun Wadekar #define INTR_SEL1_VALID_RM1		U(0x3)
45e1333f75SAchin Gupta /* Routed to EL1/EL2 from NS and to S-EL1 from Secure */
46030567e6SVarun Wadekar #define INTR_NS_VALID_RM0		U(0x0)
47e1333f75SAchin Gupta /* Routed to EL1/EL2 from NS and to EL3 from Secure */
48030567e6SVarun Wadekar #define INTR_NS_VALID_RM1		U(0x1)
494e0e0f44SSoby Mathew /* Routed to EL3 from NS. Taken to S-EL1 from Secure and handed over to EL3 */
50030567e6SVarun Wadekar #define INTR_EL3_VALID_RM0		U(0x2)
514e0e0f44SSoby Mathew /* Routed to EL3 from NS and Secure */
52030567e6SVarun Wadekar #define INTR_EL3_VALID_RM1		U(0x3)
53f4f1ae77SSoby Mathew /* This is the default routing model */
54030567e6SVarun Wadekar #define INTR_DEFAULT_RM			U(0x0)
55e1333f75SAchin Gupta 
56e1333f75SAchin Gupta /*******************************************************************************
57e1333f75SAchin Gupta  * Constants for the _individual_ routing model bits in the 'flags' field for
58e1333f75SAchin Gupta  * each interrupt type and mask to validate the 'flags' parameter while
59e1333f75SAchin Gupta  * registering an interrupt handler
60e1333f75SAchin Gupta  ******************************************************************************/
61030567e6SVarun Wadekar #define INTR_TYPE_FLAGS_MASK		U(0xFFFFFFFC)
62e1333f75SAchin Gupta 
63e1333f75SAchin Gupta #define INTR_RM_FROM_SEC_SHIFT		SECURE		/* BIT[0] */
64e1333f75SAchin Gupta #define INTR_RM_FROM_NS_SHIFT		NON_SECURE	/* BIT[1] */
65030567e6SVarun Wadekar #define INTR_RM_FROM_FLAG_MASK		U(1)
6603b645edSJeenu Viswambharan #define get_interrupt_rm_flag(flag, ss) \
6703b645edSJeenu Viswambharan 	((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK)
6803b645edSJeenu Viswambharan #define set_interrupt_rm_flag(flag, ss)	((flag) |= U(1) << (ss))
6903b645edSJeenu Viswambharan #define clr_interrupt_rm_flag(flag, ss)	((flag) &= ~(U(1) << (ss)))
70e1333f75SAchin Gupta 
71e1333f75SAchin Gupta /*******************************************************************************
72e1333f75SAchin Gupta  * Macros to set the 'flags' parameter passed to an interrupt type handler. Only
73e1333f75SAchin Gupta  * the flag to indicate the security state when the exception was generated is
74e1333f75SAchin Gupta  * supported.
75e1333f75SAchin Gupta  ******************************************************************************/
76030567e6SVarun Wadekar #define INTR_SRC_SS_FLAG_SHIFT		U(0)		/* BIT[0] */
77030567e6SVarun Wadekar #define INTR_SRC_SS_FLAG_MASK		U(1)
78ba6e5ca6SJeenu Viswambharan #define set_interrupt_src_ss(flag, val)	((flag) |= (val) << INTR_SRC_SS_FLAG_SHIFT)
79ba6e5ca6SJeenu Viswambharan #define clr_interrupt_src_ss(flag)	((flag) &= ~(U(1) << INTR_SRC_SS_FLAG_SHIFT))
80ba6e5ca6SJeenu Viswambharan #define get_interrupt_src_ss(flag)	(((flag) >> INTR_SRC_SS_FLAG_SHIFT) & \
81e1333f75SAchin Gupta 					 INTR_SRC_SS_FLAG_MASK)
82e1333f75SAchin Gupta 
83d5dfdeb6SJulius Werner #ifndef __ASSEMBLER__
84e1333f75SAchin Gupta 
85c9512bcaSAntonio Nino Diaz #include <errno.h>
86*f05b4894SMaheedhar Bollapalli #include <stddef.h>
87c639e8ebSJeenu Viswambharan #include <stdint.h>
88c639e8ebSJeenu Viswambharan 
89c9512bcaSAntonio Nino Diaz /*******************************************************************************
90c9512bcaSAntonio Nino Diaz  * Helpers to validate the routing model bits in the 'flags' for a type
91c9512bcaSAntonio Nino Diaz  * of interrupt. If the model does not match one of the valid masks
92c9512bcaSAntonio Nino Diaz  * -EINVAL is returned.
93c9512bcaSAntonio Nino Diaz  ******************************************************************************/
validate_sel1_interrupt_rm(uint32_t x)94c9512bcaSAntonio Nino Diaz static inline int32_t validate_sel1_interrupt_rm(uint32_t x)
95c9512bcaSAntonio Nino Diaz {
96c9512bcaSAntonio Nino Diaz 	if ((x == INTR_SEL1_VALID_RM0) || (x == INTR_SEL1_VALID_RM1))
97c9512bcaSAntonio Nino Diaz 		return 0;
98c9512bcaSAntonio Nino Diaz 
99c9512bcaSAntonio Nino Diaz 	return -EINVAL;
100c9512bcaSAntonio Nino Diaz }
101c9512bcaSAntonio Nino Diaz 
validate_ns_interrupt_rm(uint32_t x)102c9512bcaSAntonio Nino Diaz static inline int32_t validate_ns_interrupt_rm(uint32_t x)
103c9512bcaSAntonio Nino Diaz {
104c9512bcaSAntonio Nino Diaz 	if ((x == INTR_NS_VALID_RM0) || (x == INTR_NS_VALID_RM1))
105c9512bcaSAntonio Nino Diaz 		return 0;
106c9512bcaSAntonio Nino Diaz 
107c9512bcaSAntonio Nino Diaz 	return -EINVAL;
108c9512bcaSAntonio Nino Diaz }
109c9512bcaSAntonio Nino Diaz 
validate_el3_interrupt_rm(uint32_t x)110c9512bcaSAntonio Nino Diaz static inline int32_t validate_el3_interrupt_rm(uint32_t x)
111c9512bcaSAntonio Nino Diaz {
1127671008fSManish Pandey #if EL3_EXCEPTION_HANDLING && SPM_MM
113c9512bcaSAntonio Nino Diaz 	/*
114c9512bcaSAntonio Nino Diaz 	 * With EL3 exception handling, EL3 interrupts are always routed to EL3
1157671008fSManish Pandey 	 * from Non-secure and from secure only if SPM_MM is present.
1167c2fe62fSRaghu Krishnamurthy 	 * Therefore INTR_EL3_VALID_RM1 is the only valid routing model.
117c9512bcaSAntonio Nino Diaz 	 */
118c9512bcaSAntonio Nino Diaz 	if (x == INTR_EL3_VALID_RM1)
119c9512bcaSAntonio Nino Diaz 		return 0;
120c9512bcaSAntonio Nino Diaz #else
1217c2fe62fSRaghu Krishnamurthy 	/*
1227c2fe62fSRaghu Krishnamurthy 	 * When EL3_EXCEPTION_HANDLING is not defined both routing modes are
1237c2fe62fSRaghu Krishnamurthy 	 * valid. This is the most common case. The exception to this rule is
1247c2fe62fSRaghu Krishnamurthy 	 * when EL3_EXCEPTION_HANDLING is defined but also when the SPMC lives
1257c2fe62fSRaghu Krishnamurthy 	 * at S-EL2. In this case, Group0 Interrupts are trapped to the SPMC
1267c2fe62fSRaghu Krishnamurthy 	 * when running in S-EL0 and S-EL1. The SPMC may handle the interrupt
1277c2fe62fSRaghu Krishnamurthy 	 * itself, delegate it to an SP or forward to EL3 for handling.
1287c2fe62fSRaghu Krishnamurthy 	 */
129c9512bcaSAntonio Nino Diaz 	if ((x == INTR_EL3_VALID_RM0) || (x == INTR_EL3_VALID_RM1))
130c9512bcaSAntonio Nino Diaz 		return 0;
131c9512bcaSAntonio Nino Diaz #endif
132c9512bcaSAntonio Nino Diaz 
133c9512bcaSAntonio Nino Diaz 	return -EINVAL;
134c9512bcaSAntonio Nino Diaz }
135c9512bcaSAntonio Nino Diaz 
136c9512bcaSAntonio Nino Diaz /*******************************************************************************
137c9512bcaSAntonio Nino Diaz  * Prototype for defining a handler for an interrupt type
138c9512bcaSAntonio Nino Diaz  ******************************************************************************/
139e1333f75SAchin Gupta typedef uint64_t (*interrupt_type_handler_t)(uint32_t id,
140e1333f75SAchin Gupta 					     uint32_t flags,
141e1333f75SAchin Gupta 					     void *handle,
142e1333f75SAchin Gupta 					     void *cookie);
143e1333f75SAchin Gupta 
144e1333f75SAchin Gupta /*******************************************************************************
145e1333f75SAchin Gupta  * Function & variable prototypes
146e1333f75SAchin Gupta  ******************************************************************************/
147*f05b4894SMaheedhar Bollapalli u_register_t get_scr_el3_from_routing_model(size_t security_state);
148c6bc0710SDan Handley int32_t set_routing_model(uint32_t type, uint32_t flags);
149c6bc0710SDan Handley int32_t register_interrupt_type_handler(uint32_t type,
150e1333f75SAchin Gupta 					interrupt_type_handler_t handler,
151e1333f75SAchin Gupta 					uint32_t flags);
1529fb8af33SRoberto Vargas interrupt_type_handler_t get_interrupt_type_handler(uint32_t type);
153f4f1ae77SSoby Mathew int disable_intr_rm_local(uint32_t type, uint32_t security_state);
154f4f1ae77SSoby Mathew int enable_intr_rm_local(uint32_t type, uint32_t security_state);
155e1333f75SAchin Gupta 
156d5dfdeb6SJulius Werner #endif /*__ASSEMBLER__*/
157c3cf06f1SAntonio Nino Diaz #endif /* INTERRUPT_MGMT_H */
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