| /rk3399_ARM-atf/drivers/arm/gic/common/ |
| H A D | gic_common.c | 136 void gicd_write_igroupr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_igroupr()
147 void gicd_write_isenabler(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_isenabler()
158 void gicd_write_icenabler(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_icenabler()
169 void gicd_write_ispendr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_ispendr()
180 void gicd_write_icpendr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_icpendr()
191 void gicd_write_isactiver(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_isactiver()
202 void gicd_write_icactiver(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_icactiver()
213 void gicd_write_ipriorityr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_ipriorityr()
224 void gicd_write_icfgr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_icfgr()
235 void gicd_write_nsacr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_nsacr()
[all …]
|
| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/constraints/ |
| H A D | mt_spm_rc_dram.c | 108 static int update_rc_condition(int state_id, const void *val) in update_rc_condition()
123 static void update_rc_clkbuf_status(const void *val) in update_rc_clkbuf_status()
140 static void update_rc_ufs_status(const void *val) in update_rc_ufs_status()
157 static void update_rc_status(const void *val) in update_rc_status()
183 int spm_update_rc_dram(int state_id, int type, const void *val) in spm_update_rc_dram()
|
| H A D | mt_spm_rc_internal.h | 22 #define SPM_RC_UPDATE_COND_RC_ID_GET(val) \ argument
25 #define SPM_RC_UPDATE_COND_ID_GET(val) (val & SPM_RC_UPDATE_COND_ID_MASK) argument
|
| /rk3399_ARM-atf/drivers/brcm/mdio/ |
| H A D | mdio.c | 18 uint32_t val; in mdio_op_status() local
32 uint16_t val, uint8_t op) in mdio_op()
67 int mdio_write(uint16_t busid, uint16_t phyid, uint32_t reg, uint16_t val) in mdio_write()
|
| /rk3399_ARM-atf/lib/extensions/sys_reg_trace/aarch64/ |
| H A D | sys_reg_trace.c | 19 uint64_t val = per_world_ctx->ctx_cptr_el3; in sys_reg_trace_enable_per_world() local
31 uint64_t val = per_world_ctx->ctx_cptr_el3; in sys_reg_trace_disable_per_world() local
|
| /rk3399_ARM-atf/plat/nxp/common/soc_errata/ |
| H A D | errata_a008850.c | 18 uint32_t val = mmio_read_32(cci_base + CTRL_OVERRIDE_REG); in erratum_a008850_early() local
30 uint32_t val = mmio_read_32(cci_base + CTRL_OVERRIDE_REG); in erratum_a008850_post() local
|
| /rk3399_ARM-atf/plat/mediatek/common/lpm/ |
| H A D | mt_lp_api.c | 11 int ret, val; in mt_audio_update() local
34 int ret, val; in mtk_usb_update() local
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/drivers/se/ |
| H A D | se.c | 40 uint32_t val = 0U; in tegra_se_operation_complete() local
76 uint32_t val = 0U; in tegra_se_start_normal_operation() local
128 uint32_t val, last_buf, i; in tegra_se_calculate_sha256_hash() local
244 uint32_t val = 0U, hash_offset = 0U, scratch_offset = 0U, security; in tegra_se_save_sha256_hash() local
|
| /rk3399_ARM-atf/plat/mediatek/mt8173/ |
| H A D | plat_sip_calls.c | 29 uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val) in mt_sip_set_authorized_sreg()
43 static uint64_t mt_sip_pwr_on_mtcmos(uint32_t val) in mt_sip_pwr_on_mtcmos()
54 static uint64_t mt_sip_pwr_off_mtcmos(uint32_t val) in mt_sip_pwr_off_mtcmos()
|
| /rk3399_ARM-atf/lib/libfdt/ |
| H A D | fdt_addresses.c | 17 uint32_t val; in fdt_cells() local
36 int val; in fdt_address_cells() local
48 int val; in fdt_size_cells() local
|
| H A D | libfdt.h | 1386 const char *name, uint32_t val) in fdt_setprop_inplace_u32()
1421 const char *name, uint64_t val) in fdt_setprop_inplace_u64()
1438 const char *name, uint32_t val) in fdt_setprop_inplace_cell()
1541 static inline int fdt_property_u32(void *fdt, const char *name, uint32_t val) in fdt_property_u32()
1546 static inline int fdt_property_u64(void *fdt, const char *name, uint64_t val) in fdt_property_u64()
1553 static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val) in fdt_property_cell()
1753 uint32_t val) in fdt_setprop_u32()
1788 uint64_t val) in fdt_setprop_u64()
1806 uint32_t val) in fdt_setprop_cell()
1931 const char *name, uint32_t val) in fdt_appendprop_u32()
[all …]
|
| /rk3399_ARM-atf/drivers/arm/gic/v2/ |
| H A D | gicv2_helpers.c | 53 void gicd_write_itargetsr(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_itargetsr()
63 void gicd_write_cpendsgir(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_cpendsgir()
73 void gicd_write_spendsgir(uintptr_t base, unsigned int id, unsigned int val) in gicd_write_spendsgir()
84 unsigned int val; in gicv2_get_cpuif_id() local
|
| /rk3399_ARM-atf/plat/nvidia/tegra/include/drivers/ |
| H A D | memctrl_v2.h | 35 uint32_t val; member
67 static inline void tegra_mc_write_32(uint32_t off, uint32_t val) in tegra_mc_write_32()
78 static inline void tegra_mc_streamid_write_32(uint32_t off, uint32_t val) in tegra_mc_streamid_write_32()
|
| /rk3399_ARM-atf/include/lib/ |
| H A D | mmio_poll.h | 27 #define mmio_read_poll_timeout(op, val, cond, timeout_us, args...)\ argument
42 #define mmio_read_32_poll_timeout(addr, val, cond, timeout_us) \ argument
|
| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/constraints/ |
| H A D | mt_spm_rc_internal.h | 25 #define SPM_RC_UPDATE_COND_RC_ID_GET(val) \ argument
29 #define SPM_RC_UPDATE_COND_ID_GET(val) \ argument
|
| /rk3399_ARM-atf/plat/imx/imx8m/imx8mq/ |
| H A D | gpc.c | 71 uint32_t val = gpc_saved_imrs[core_id + imr_idx * 4]; in gpc_restore_imr_lpm() local
111 unsigned int val; in imx_gpc_hwirq_mask() local
128 unsigned int val; in imx_gpc_hwirq_unmask() local
186 unsigned int val; in imx_gpc_set_affinity() local
276 uint32_t val; in imx_set_cluster_powerdown() local
386 uint32_t val; in imx_gpc_init() local
|
| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/ |
| H A D | mt_spm_hwreq.c | 70 uint32_t is_set, uint32_t val) in __spm_hwcg_ctrl()
86 uint32_t is_set, uint32_t val) in spm_hwcg_ctrl()
110 uint32_t is_set, uint32_t val) in spm_hwcg_ctrl_by_index()
178 uint32_t val = 0; in spm_hwcg_get_status() local
319 uint32_t val = 0, reg = 0; in spm_peri_req_get_status() local
533 uint32_t is_set, uint32_t val) in __spm_peri_req_ctrl()
553 uint32_t is_set, uint32_t val) in spm_peri_req_ctrl()
577 uint32_t is_set, uint32_t val) in spm_peri_req_ctrl_by_index()
|
| H A D | mt_vcore_dvfsrc_plat.c | 112 static void spm_vcorefs_pwarp_cmd(uint64_t cmd, uint64_t val) in spm_vcorefs_pwarp_cmd()
332 int spm_vcorefs_get_vcore_uv(uint32_t gear, uint32_t *val) in spm_vcorefs_get_vcore_uv()
342 int spm_vcorefs_get_dram_freq(uint32_t gear, uint32_t *val) in spm_vcorefs_get_dram_freq()
355 int spm_vcorefs_get_vcore_opp_num(uint32_t *val) in spm_vcorefs_get_vcore_opp_num()
362 int spm_vcorefs_get_dram_opp_num(uint32_t *val) in spm_vcorefs_get_dram_opp_num()
369 int spm_vcorefs_get_opp_type(uint32_t *val) in spm_vcorefs_get_opp_type()
376 int spm_vcorefs_get_fw_type(uint32_t *val) in spm_vcorefs_get_fw_type()
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/ |
| H A D | plat_psci_handlers.c | 108 uint32_t bpmp_reply, data[3], val; in tegra_soc_get_target_pwr_state() local
204 uint32_t val; in tegra_soc_pwr_domain_suspend() local
275 uint32_t val, mask; in tegra_reset_all_dma_masters() local
348 uint32_t val; in tegra_soc_pwr_domain_power_down_wfi() local
437 uint32_t val, entrypoint = 0; in tegra_soc_pwr_domain_on_finish() local
|
| /rk3399_ARM-atf/include/drivers/nxp/smmu/ |
| H A D | nxp_smmu.h | 22 uint32_t val; in bypass_smmu() local
35 uint32_t val; in smmu_cache_unlock() local
|
| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/constraints/ |
| H A D | mt_spm_rc_internal.h | 26 #define SPM_RC_UPDATE_COND_RC_ID_GET(val) \ argument
30 #define SPM_RC_UPDATE_COND_ID_GET(val) (val & SPM_RC_UPDATE_COND_ID_MASK) argument
|
| /rk3399_ARM-atf/plat/mediatek/drivers/mminfra/mt8196/ |
| H A D | mminfra.c | 52 uint32_t val; in spm_semaphore_get() local
76 uint32_t val; in spm_semaphore_release() local
129 uint32_t val = 0, cnt; in mminfra_hwv_power_ctrl() local
|
| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/ |
| H A D | mt_spm_hwreq.c | 70 uint32_t val) in __spm_hwcg_ctrl()
86 uint32_t val) in spm_hwcg_ctrl()
110 uint32_t is_set, uint32_t val) in spm_hwcg_ctrl_by_index()
189 uint32_t val = 0; in spm_hwcg_get_status() local
364 uint32_t val = 0, reg = 0; in spm_peri_req_get_status() local
586 uint32_t val) in __spm_peri_req_ctrl()
604 void spm_peri_req_ctrl(uint32_t res, uint32_t is_set, uint32_t val) in spm_peri_req_ctrl()
629 void spm_peri_req_ctrl_by_index(uint32_t idx, uint32_t is_set, uint32_t val) in spm_peri_req_ctrl_by_index()
|
| /rk3399_ARM-atf/drivers/st/pmic/ |
| H A D | stpmic2.c | 185 uint8_t val = value; in stpmic2_register_write() local
202 uint8_t val = 0U; in stpmic2_register_update() local
233 uint8_t val; in stpmic2_regulator_get_state() local
261 uint8_t id, uint16_t *val) in stpmic2_regulator_get_voltage()
348 uint8_t val; in stpmic2_regulator_get_prop() local
444 uint16_t val; in stpmic2_dump_regulators() local
462 int stpmic2_get_version(struct pmic_handle_s *pmic, uint8_t *val) in stpmic2_get_version()
467 int stpmic2_get_product_id(struct pmic_handle_s *pmic, uint8_t *val) in stpmic2_get_product_id()
|
| /rk3399_ARM-atf/drivers/arm/tzc/ |
| H A D | tzc380.c | 33 unsigned int val) in tzc380_write_region_base_low()
39 unsigned int val) in tzc380_write_region_base_high()
45 unsigned int val) in tzc380_write_region_attributes()
|