| #
e180cdba |
| 12-Oct-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "deprecated-macro" into integration
* changes: Makefile: Remove unused macro plat: brcm: Remove 'AARCH32' deprecated macro Remove deprecated macro from TF-A code
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| #
c959ea78 |
| 07-Oct-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
Remove deprecated macro from TF-A code
Removed '__ASSEMBLY__' deprecated macro from TF-A code
Change-Id: I9082a568b695acb5b903f509db11c8672b62d9d0 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@
Remove deprecated macro from TF-A code
Removed '__ASSEMBLY__' deprecated macro from TF-A code
Change-Id: I9082a568b695acb5b903f509db11c8672b62d9d0 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| #
859df7d5 |
| 28-Aug-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "tegra-downstream-08252020" into integration
* changes: Tegra194: remove unused tegra_mc_defs header Tegra: memctrl: platform setup handler functions Tegra194: memctrl
Merge changes from topic "tegra-downstream-08252020" into integration
* changes: Tegra194: remove unused tegra_mc_defs header Tegra: memctrl: platform setup handler functions Tegra194: memctrl: remove streamid security cfg registers Tegra194: memctrl: remove streamid override cfg registers Tegra: debug prints indicating SC7 entry sequence completion Tegra194: add strict checking mode verification Tegra194: memctrl: update TZDRAM base at 1MB granularity Tegra194: ras: split up RAS error clear SMC call. Tegra: platform specific GIC sources Tegra194: add memory barriers during DRAM to SysRAM copy Tegra: sip: add VPR resize enabled check Tegra194: add redundancy checks for MMIO writes Tegra: remove unused cortex_a53.h Tegra194: report failure to enable dual execution Tegra194: verify firewall settings before resource use
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| #
08e60f80 |
| 26-Aug-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: memctrl: platform setup handler functions
The driver initially contained the setup steps to help Tegra186 and Tegra194 SoCs. In order to support future SoCs and make sure that the driver rema
Tegra: memctrl: platform setup handler functions
The driver initially contained the setup steps to help Tegra186 and Tegra194 SoCs. In order to support future SoCs and make sure that the driver remains generic enough, some code should be moved to SoC.
This patch creates a setup handler for a platform to implement its initialization sequence.
Change-Id: I8bab7fd07f25e0457ead8e2d2713efe54782a59b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| #
2561cb50 |
| 13-Nov-2019 |
Anthony Zhou <anzhou@nvidia.com> |
Tegra194: add redundancy checks for MMIO writes
MMIO writes should verify that the writes actually went through. Read the value back after the write operation, perform assert if the read back value
Tegra194: add redundancy checks for MMIO writes
MMIO writes should verify that the writes actually went through. Read the value back after the write operation, perform assert if the read back value is not same as the write value.
Change-Id: Id2ceb014116f3aa6a9e86505ca1ae9911470a679 Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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| #
0d5caf95 |
| 25-Aug-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Merge changes from topic "tegra-downstream-07092020" into integration
* changes: Tegra194: remove AON_WDT IRQ mapping Tegra: smmu: add smmu_verify function Tegra: TZDRAM setup from soc specifi
Merge changes from topic "tegra-downstream-07092020" into integration
* changes: Tegra194: remove AON_WDT IRQ mapping Tegra: smmu: add smmu_verify function Tegra: TZDRAM setup from soc specific early_boot handlers Tegra: remove "platform_get_core_pos" function Tegra: print GICC registers conditionally lib: cpus: sanity check pointers before use Tegra: spe: do not flush console in console_putc Tegra: verify platform compatibility
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| #
21ec61a9 |
| 26-Sep-2019 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: smmu: add smmu_verify function
The SMMU configuration can get corrupted or updated by external clients during boot without our knowledge.
This patch introduces a "verify" function for the SM
Tegra: smmu: add smmu_verify function
The SMMU configuration can get corrupted or updated by external clients during boot without our knowledge.
This patch introduces a "verify" function for the SMMU driver, to check that the boot configuration settings are intact. Usually, this function should be called at the end of the boot cycle.
This function only calls panic() on silicon platforms.
Change-Id: I2ab45a7f228781e71c73ba1f4ffc49353effe146 Signed-off-by: George Bauernschmidt <georgeb@nvidia.com>
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| #
56887791 |
| 12-Mar-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "tegra-downstream-03102020" into integration
* changes: Tegra210: Remove "unsupported func ID" error msg Tegra210: support for secure physical timer spd: tlkd: secure
Merge changes from topic "tegra-downstream-03102020" into integration
* changes: Tegra210: Remove "unsupported func ID" error msg Tegra210: support for secure physical timer spd: tlkd: secure timer interrupt handler Tegra: smmu: export handlers to read/write SMMU registers Tegra: smmu: remove context save sequence Tegra: bpmp: fixup TEGRA_CLK_SE values for Tegra186/Tegra194 Tegra194: memctrl: lock some more MC SID security configs Tegra194: add SE support to generate SHA256 of TZRAM Tegra194: store TZDRAM base/size to scratch registers Tegra194: fix warnings for extra parentheses
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| #
a391d494 |
| 03-Aug-2018 |
Pritesh Raithatha <praithatha@nvidia.com> |
Tegra: smmu: remove context save sequence
SMMU and MC registers are saved as part of the System Suspend sequence. The register list includes some NS world SMMU registers that need to be saved by NS
Tegra: smmu: remove context save sequence
SMMU and MC registers are saved as part of the System Suspend sequence. The register list includes some NS world SMMU registers that need to be saved by NS world software instead. All that remains as a result are the MC registers.
This patch moves code to MC file as a result and renames all the variables and defines to use the MC prefix instead of SMMU. The Tegra186 and Tegra194 platform ports are updated to provide the MC context register list to the parent driver. The memory required for context save is reduced due to removal of the SMMU registers.
Change-Id: I83a05079039f52f9ce91c938ada6cd6dfd9c843f Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
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| #
01c44ddd |
| 02-Aug-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__" into integration
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| #
d5dfdeb6 |
| 09-Jul-2019 |
Julius Werner <jwerner@chromium.org> |
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.
All common C compilers predefine a macro called __ASSEMBLER__ when pre
Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__.
All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard.
Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
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| #
8a08e272 |
| 04-Apr-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1920 from ambroise-arm/av/deprecated
Remove deprecated interfaces
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| #
6e756f6d |
| 28-Mar-2019 |
Ambroise Vincent <ambroise.vincent@arm.com> |
Makefile: remove extra include paths in INCLUDES
Now it is needed to use the full path of the common header files.
Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more informatio
Makefile: remove extra include paths in INCLUDES
Now it is needed to use the full path of the common header files.
Commit 09d40e0e0828 ("Sanitise includes across codebase") provides more information.
Change-Id: Ifedc79d9f664d208ba565f5736612a3edd94c647 Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
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| #
bc5e79cd |
| 25-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1776 from vwadekar/tf2.0-tegra-downstream-rebase-1.22.19
Tf2.0 tegra downstream rebase 1.22.19
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| #
d5bd0de6 |
| 30-Oct-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: memctrl_v2: platform handler for TZDRAM settings
The Tegra memctrl driver sets up the TZDRAM fence during boot and system suspend exit. This patch provides individual platforms with handlers
Tegra: memctrl_v2: platform handler for TZDRAM settings
The Tegra memctrl driver sets up the TZDRAM fence during boot and system suspend exit. This patch provides individual platforms with handlers to perform platform specific steps, e.g. enable encryption, save base/size to secure scratch registers.
Change-Id: Ifaa2e0eac20b50f77ec734256544c36dd511bd63 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| #
ab2eb455 |
| 04-Aug-2017 |
Puneet Saxena <puneets@nvidia.com> |
Tegra: memctrl_v2: platform handlers to program MSS
Introduce platform handlers to program the MSS settings. This allows the current driver to scale to future chips.
Change-Id: I40a27648a1a3c73b1ce
Tegra: memctrl_v2: platform handlers to program MSS
Introduce platform handlers to program the MSS settings. This allows the current driver to scale to future chips.
Change-Id: I40a27648a1a3c73b1ce38dafddc1babb6f0b0d9b Signed-off-by: Puneet Saxena <puneets@nvidia.com> Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
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| #
c40c88f8 |
| 21-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1764 from vwadekar/tf2.0-tegra-downstream-rebase-1.7.19
Tf2.0 tegra downstream rebase 1.7.19
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| #
aa64c5fb |
| 26-Jul-2017 |
Anthony Zhou <anzhou@nvidia.com> |
Tegra: fix defects flagged by MISRA Rule 10.3
MISRA Rule 10.3, the value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category.
Tegra: fix defects flagged by MISRA Rule 10.3
MISRA Rule 10.3, the value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category.
The essential type of a enum member is anonymous enum, the enum member should be casted to the right type when using it.
Both UL and ULL suffix equal to uint64_t constant in compiler aarch64-linux-gnu-gcc, to avoid confusing, only keep U and ULL suffix in platform code. So in some case, cast a constant to uint32_t is necessary.
Change-Id: I1aae8cba81ef47481736e7f95f53570de7013187 Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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| #
61beb3e0 |
| 28-Jun-2017 |
Anthony Zhou <anzhou@nvidia.com> |
Tegra: common: drivers: fix MISRA defects
Main fixes:
Add suffix U for constant [Rule 10.1]
Match the operands type [Rule 10.4]
Use UL replace U for that constant define that need do "~" operatio
Tegra: common: drivers: fix MISRA defects
Main fixes:
Add suffix U for constant [Rule 10.1]
Match the operands type [Rule 10.4]
Use UL replace U for that constant define that need do "~" operation [Rule 12.4]
Voided non c-library functions whose return types are not used [Rule 17.7]
Change-Id: Ia1e814ca3890eab7904be9c79030502408f30936 Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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| #
af4aad2f |
| 17-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1733 from vwadekar/tf2.0-tegra-downstream-rebase-1.3.19
Tegra downstream rebase 1.3.19
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| #
b86e691e |
| 25-May-2017 |
Krishna Reddy <vdumpa@nvidia.com> |
Tegra186: memctrl_v2: Set MC clients ordering as per client needs
Set MC Clients ordering as per the clients needs(ordered, BW, ISO/non-ISO) based on the latest info received from HW team as a part
Tegra186: memctrl_v2: Set MC clients ordering as per client needs
Set MC Clients ordering as per the clients needs(ordered, BW, ISO/non-ISO) based on the latest info received from HW team as a part of BW issues debug.
SMMU Client config register are obsolete from T186. Clean up the unnecessary register definitions and programming of these registers. Cleanup unnecessary macros as well.
Change-Id: I0d28ae8842a33ed534f6a15bfca3c9926b3d46b2 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
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| #
9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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| #
09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| #
9d068f66 |
| 08-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
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| #
c3cf06f1 |
| 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver - dt-bindings folders - zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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