| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/soc/ |
| H A D | soc.c | 53 static void set_pll_slow_mode(uint32_t pll_id) in set_pll_slow_mode()
62 static void set_pll_normal_mode(uint32_t pll_id) in set_pll_normal_mode()
71 static void set_pll_bypass(uint32_t pll_id) in set_pll_bypass()
81 static void _pll_suspend(uint32_t pll_id) in _pll_suspend()
123 static void restore_pll(int pll_id, uint32_t *src) in restore_pll()
154 static void save_pll(uint32_t *dst, int pll_id) in save_pll()
218 static void set_plls_nobypass(uint32_t pll_id) in set_plls_nobypass()
228 static void _pll_resume(uint32_t pll_id) in _pll_resume()
|
| H A D | soc.h | 16 #define CRU_PLL_CON(pll_id, n) ((pll_id) * 0x20 + (n) * 4) argument
|
| /rk3399_ARM-atf/plat/rockchip/rk3328/drivers/pmu/ |
| H A D | pmu.c | 270 static inline void pm_pll_wait_lock(uint32_t pll_id) in pm_pll_wait_lock()
284 static inline void pll_pwr_dwn(uint32_t pll_id, uint32_t pd) in pll_pwr_dwn()
340 static inline void pll_suspend(uint32_t pll_id) in pll_suspend()
356 static inline void pll_resume(uint32_t pll_id) in pll_resume()
|
| H A D | pmu.h | 116 #define PLL_IS_NORM_MODE(mode, pll_id) \ argument
|
| /rk3399_ARM-atf/plat/rockchip/rk3368/drivers/soc/ |
| H A D | soc.c | 125 static void plls_suspend(uint32_t pll_id) in plls_suspend()
|
| /rk3399_ARM-atf/plat/rockchip/rk3288/drivers/soc/ |
| H A D | soc.c | 105 static void pll_save(uint32_t pll_id) in pll_save()
|
| /rk3399_ARM-atf/plat/rockchip/px30/drivers/pmu/ |
| H A D | pmu.c | 855 static inline void pm_pll_wait_lock(uint32_t pll_base, uint32_t pll_id) in pm_pll_wait_lock()
870 static inline void pll_set_mode(uint32_t pll_id, uint32_t mode) in pll_set_mode()
881 static inline void pll_suspend(uint32_t pll_id) in pll_suspend()
900 static inline void pll_resume(uint32_t pll_id) in pll_resume()
|
| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 1082 static unsigned long stm32mp1_read_pll_freq(enum stm32mp1_pll_id pll_id, in stm32mp1_read_pll_freq()
1725 static bool stm32mp1_check_pll_conf(enum stm32mp1_pll_id pll_id, in stm32mp1_check_pll_conf()
1795 static void stm32mp1_pll_start(enum stm32mp1_pll_id pll_id) in stm32mp1_pll_start()
1807 static int stm32mp1_pll_output(enum stm32mp1_pll_id pll_id, uint32_t output) in stm32mp1_pll_output()
1828 static int stm32mp1_pll_stop(enum stm32mp1_pll_id pll_id) in stm32mp1_pll_stop()
1854 static void stm32mp1_pll_config_output(enum stm32mp1_pll_id pll_id, in stm32mp1_pll_config_output()
1870 static int stm32mp1_pll_config(enum stm32mp1_pll_id pll_id, in stm32mp1_pll_config()
1918 static void stm32mp1_pll_csg(enum stm32mp1_pll_id pll_id, uint32_t *csg) in stm32mp1_pll_csg()
2433 enum stm32mp1_pll_id pll_id; in get_parent_id_parent() local
|
| H A D | clk-stm32mp2.c | 685 enum pll_id { enum
767 uint16_t pll_id; member
|
| H A D | clk-stm32mp13.c | 1696 uint8_t pll_id; member
|
| /rk3399_ARM-atf/plat/rockchip/rk3588/drivers/soc/ |
| H A D | soc.h | 10 enum pll_id { enum
42 #define CRU_PLLS_CON(pll_id, i) (0x160 + (pll_id) * 0x20 + (i) * 0x4) argument
|
| /rk3399_ARM-atf/plat/rockchip/rk3568/drivers/pmu/ |
| H A D | pmu.c | 77 uint32_t pll_id; in pmu_pll_powerdown_config() local
|
| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/ |
| H A D | pmu.c | 565 uint32_t pll_id, clst_st_msk, clst_st_chk_msk, pmu_st; in clst_pwr_domain_suspend() local
609 uint32_t pll_id, pll_st; in clst_pwr_domain_resume() local
|
| /rk3399_ARM-atf/plat/rockchip/rk3576/drivers/soc/ |
| H A D | soc.h | 9 enum pll_id { enum
32 #define CRU_PLLS_CON(pll_id, i) ((pll_id) * 0x20 + (i) * 0x4) argument
|
| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/ |
| H A D | suspend.c | 653 __pmusramfunc static void pmusram_restore_pll(int pll_id, uint32_t *src) in pmusram_restore_pll()
|