Searched defs:fbd_offset (Results 1 – 15 of 15) sorted by relevance
| /rockchip-linux_mpp/mpp/hal/rkdec/vp9d/ |
| H A D | hal_vp9d_vdpu34x.c | 633 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu34x_gen_regs() local
688 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu34x_gen_regs() local
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| H A D | hal_vp9d_vdpu382.c | 643 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu382_gen_regs() local
698 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu382_gen_regs() local
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| H A D | hal_vp9d_vdpu383.c | 859 RK_U32 fbd_offset; in hal_vp9d_vdpu383_gen_regs() local
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| /rockchip-linux_mpp/mpp/hal/rkdec/h265d/ |
| H A D | hal_h265d_vdpu34x.c | 959 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 64) / 16, SZ_4K); in hal_h265d_vdpu34x_gen_regs() local
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| H A D | hal_h265d_vdpu382.c | 748 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 64) / 16, SZ_4K); in hal_h265d_vdpu382_gen_regs() local
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| H A D | hal_h265d_vdpu384a.c | 904 RK_U32 fbd_offset; in hal_h265d_vdpu384a_gen_regs() local
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| H A D | hal_h265d_vdpu383.c | 992 RK_U32 fbd_offset; in hal_h265d_vdpu383_gen_regs() local
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| /rockchip-linux_mpp/mpp/hal/rkdec/avs2d/ |
| H A D | hal_avs2d_vdpu383.c | 384 RK_U32 fbd_offset; in fill_registers() local
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| H A D | hal_avs2d_rkv.c | 357 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in fill_registers() local
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| H A D | hal_avs2d_vdpu382.c | 413 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in fill_registers() local
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| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_vdpu384a.c | 377 RK_U32 fbd_offset; in set_registers() local
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| H A D | hal_h264d_vdpu34x.c | 559 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in set_registers() local
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| H A D | hal_h264d_vdpu383.c | 441 RK_U32 fbd_offset; in set_registers() local
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| H A D | hal_h264d_vdpu382.c | 568 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in set_registers() local
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| /rockchip-linux_mpp/mpp/hal/rkdec/av1d/ |
| H A D | hal_av1d_vdpu383.c | 2340 RK_U32 fbd_offset; in vdpu383_av1d_gen_regs() local
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