| 7abd5aab | 24-Mar-2017 |
Wenyou Yang <wenyou.yang@atmel.com> |
ARM: at91: lds: use "_image_binary_end" for DT location
The MMC SPL locates the BSS section to a different memory region
from text, then use "_image_binary_end" variable to point to the
correct devi
ARM: at91: lds: use "_image_binary_end" for DT location
The MMC SPL locates the BSS section to a different memory region
from text, then use "_image_binary_end" variable to point to the
correct device tree location.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
show more ...
|
| 5bede73c | 24-Mar-2017 |
Wenyou Yang <wenyou.yang@atmel.com> |
ARM: spl: atmel: move mem_init() advance in SPL init.
Because the MMC SPL puts the bbs section in the ddr memory, move
calling mem_init() before calling spl_init().
Signed-off-by: Wenyou Yang <weny
ARM: spl: atmel: move mem_init() advance in SPL init.
Because the MMC SPL puts the bbs section in the ddr memory, move
calling mem_init() before calling spl_init().
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
show more ...
|
| 730a7b47 | 24-Mar-2017 |
Wenyou Yang <wenyou.yang@atmel.com> |
ARM: spl: atmel: bring in serial device before init
Before setting up the serial communications, bring in the serial
device from the device tree file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.
ARM: spl: atmel: bring in serial device before init
Before setting up the serial communications, bring in the serial
device from the device tree file.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
show more ...
|
| 9319a756 | 23-Mar-2017 |
Wenyou Yang <wenyou.yang@atmel.com> |
pinctrl: at91: add pinctrl driver
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC w
pinctrl: at91: add pinctrl driver
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|
| 6ed67659 | 17-Aug-2016 |
Heiko Schocher <hs@denx.de> |
arm, at91: add icache support
add at least icache support for at91 based boards.
This speeds up NOR flash access on an at91sam9g15
based board from 15.2 seconds reading 8 MiB from
a SPI NOR flash to
arm, at91: add icache support
add at least icache support for at91 based boards.
This speeds up NOR flash access on an at91sam9g15
based board from 15.2 seconds reading 8 MiB from
a SPI NOR flash to 5.7 seconds.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
show more ...
|
| 806a5a39 | 17-Aug-2016 |
Heiko Schocher <hs@denx.de> |
ARM: at91: clock: correct PRES offset for at91sam9x5
on at91sam9x5 PRES offset is 4 in the PMC master
clock register.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@a
ARM: at91: clock: correct PRES offset for at91sam9x5
on at91sam9x5 PRES offset is 4 in the PMC master
clock register.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Andreas Bießmann <andreas@biessmann.org>
show more ...
|
| 46ed9381 | 20-Jul-2016 |
Wenyou Yang <wenyou.yang@atmel.com> |
gpio: atmel_pio4: Move PIO4 definitions to head file
In order to make these PIO4 definitions shared with AT91 PIO4
pinctrl driver, move them from the existing gpio driver to the
head file, and rephr
gpio: atmel_pio4: Move PIO4 definitions to head file
In order to make these PIO4 definitions shared with AT91 PIO4
pinctrl driver, move them from the existing gpio driver to the
head file, and rephrase them.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|