xref: /rk3399_rockchip-uboot/include/configs/sunxi-common.h (revision 3a649407a49b041ceb826d55b5919dc8297f8965)
1 /*
2  * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3  *
4  * (C) Copyright 2007-2011
5  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6  * Tom Cubie <tangliang@allwinnertech.com>
7  *
8  * Configuration settings for the Allwinner sunxi series of boards.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef _SUNXI_COMMON_CONFIG_H
14 #define _SUNXI_COMMON_CONFIG_H
15 
16 #include <asm/arch/cpu.h>
17 #include <linux/stringify.h>
18 
19 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20 /*
21  * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22  * expense of restricting some features, so the regular machine id values can
23  * be used.
24  */
25 # define CONFIG_MACH_TYPE_COMPAT_REV	0
26 #else
27 /*
28  * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29  * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30  * beyond the machine id check.
31  */
32 # define CONFIG_MACH_TYPE_COMPAT_REV	1
33 #endif
34 
35 /* Serial & console */
36 #define CONFIG_SYS_NS16550_SERIAL
37 /* ns16550 reg in the low bits of cpu reg */
38 #define CONFIG_SYS_NS16550_CLK		24000000
39 #ifndef CONFIG_DM_SERIAL
40 # define CONFIG_SYS_NS16550_REG_SIZE	-4
41 # define CONFIG_SYS_NS16550_COM1		SUNXI_UART0_BASE
42 # define CONFIG_SYS_NS16550_COM2		SUNXI_UART1_BASE
43 # define CONFIG_SYS_NS16550_COM3		SUNXI_UART2_BASE
44 # define CONFIG_SYS_NS16550_COM4		SUNXI_UART3_BASE
45 # define CONFIG_SYS_NS16550_COM5		SUNXI_R_UART_BASE
46 #endif
47 
48 /* CPU */
49 #define CONFIG_TIMER_CLK_FREQ		24000000
50 
51 /*
52  * The DRAM Base differs between some models. We cannot use macros for the
53  * CONFIG_FOO defines which contain the DRAM base address since they end
54  * up unexpanded in include/autoconf.mk .
55  *
56  * So we have to have this #ifdef #else #endif block for these.
57  */
58 #ifdef CONFIG_MACH_SUN9I
59 #define SDRAM_OFFSET(x) 0x2##x
60 #define CONFIG_SYS_SDRAM_BASE		0x20000000
61 #define CONFIG_SYS_LOAD_ADDR		0x22000000 /* default load address */
62 #define CONFIG_SYS_TEXT_BASE		0x2a000000
63 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
64  * since it needs to fit in with the other values. By also #defining it
65  * we get warnings if the Kconfig value mismatches. */
66 #define CONFIG_SPL_STACK_R_ADDR		0x2fe00000
67 #define CONFIG_SPL_BSS_START_ADDR	0x2ff80000
68 #else
69 #define SDRAM_OFFSET(x) 0x4##x
70 #define CONFIG_SYS_SDRAM_BASE		0x40000000
71 #define CONFIG_SYS_LOAD_ADDR		0x42000000 /* default load address */
72 #define CONFIG_SYS_TEXT_BASE		0x4a000000
73 /* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
74  * since it needs to fit in with the other values. By also #defining it
75  * we get warnings if the Kconfig value mismatches. */
76 #define CONFIG_SPL_STACK_R_ADDR		0x4fe00000
77 #define CONFIG_SPL_BSS_START_ADDR	0x4ff80000
78 #endif
79 
80 #define CONFIG_SPL_BSS_MAX_SIZE		0x00080000 /* 512 KiB */
81 
82 #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
83 /*
84  * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
85  * slightly bigger. Note that it is possible to map the first 32 KiB of the
86  * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
87  * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
88  * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
89  */
90 #define CONFIG_SYS_INIT_RAM_ADDR	0x10000
91 #define CONFIG_SYS_INIT_RAM_SIZE	0x08000	/* FIXME: 40 KiB ? */
92 #else
93 #define CONFIG_SYS_INIT_RAM_ADDR	0x0
94 #define CONFIG_SYS_INIT_RAM_SIZE	0x8000	/* 32 KiB */
95 #endif
96 
97 #define CONFIG_SYS_INIT_SP_OFFSET \
98 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
99 #define CONFIG_SYS_INIT_SP_ADDR \
100 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
101 
102 #define CONFIG_NR_DRAM_BANKS		1
103 #define PHYS_SDRAM_0			CONFIG_SYS_SDRAM_BASE
104 #define PHYS_SDRAM_0_SIZE		0x80000000 /* 2 GiB */
105 
106 #ifdef CONFIG_AHCI
107 #define CONFIG_LIBATA
108 #define CONFIG_SCSI_AHCI
109 #define CONFIG_SCSI_AHCI_PLAT
110 #define CONFIG_SUNXI_AHCI
111 #define CONFIG_SYS_64BIT_LBA
112 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
113 #define CONFIG_SYS_SCSI_MAX_LUN		1
114 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
115 					 CONFIG_SYS_SCSI_MAX_LUN)
116 #define CONFIG_SCSI
117 #endif
118 
119 #define CONFIG_SETUP_MEMORY_TAGS
120 #define CONFIG_CMDLINE_TAG
121 #define CONFIG_INITRD_TAG
122 #define CONFIG_SERIAL_TAG
123 
124 #ifdef CONFIG_NAND_SUNXI
125 #define CONFIG_SYS_NAND_MAX_ECCPOS 1664
126 #define CONFIG_SYS_NAND_ONFI_DETECTION
127 #define CONFIG_SYS_MAX_NAND_DEVICE 8
128 #endif
129 
130 #ifdef CONFIG_SPL_SPI_SUNXI
131 #define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
132 #endif
133 
134 /* mmc config */
135 #ifdef CONFIG_MMC
136 #define CONFIG_MMC_SUNXI_SLOT		0
137 #define CONFIG_ENV_IS_IN_MMC
138 #define CONFIG_SYS_MMC_ENV_DEV		0	/* first detected MMC controller */
139 #define CONFIG_SYS_MMC_MAX_DEVICE	4
140 #endif
141 
142 /* 64MB of malloc() pool */
143 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (64 << 20))
144 
145 /*
146  * Miscellaneous configurable options
147  */
148 #define CONFIG_SYS_CBSIZE	1024	/* Console I/O Buffer Size */
149 #define CONFIG_SYS_PBSIZE	1024	/* Print Buffer Size */
150 #define CONFIG_SYS_MAXARGS	16	/* max number of command args */
151 
152 /* Boot Argument Buffer Size */
153 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
154 
155 /* standalone support */
156 #define CONFIG_STANDALONE_LOAD_ADDR	CONFIG_SYS_LOAD_ADDR
157 
158 /* baudrate */
159 #define CONFIG_BAUDRATE			115200
160 
161 /* The stack sizes are set up in start.S using the settings below */
162 #define CONFIG_STACKSIZE		(256 << 10)	/* 256 KiB */
163 
164 /* FLASH and environment organization */
165 
166 #define CONFIG_SYS_MONITOR_LEN		(768 << 10)	/* 768 KiB */
167 
168 #define CONFIG_ENV_OFFSET		(544 << 10) /* (8 + 24 + 512) KiB */
169 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
170 
171 #define CONFIG_FAT_WRITE	/* enable write access */
172 
173 #define CONFIG_SPL_FRAMEWORK
174 
175 #ifndef CONFIG_ARM64		/* AArch64 FEL support is not ready yet */
176 #define CONFIG_SPL_BOARD_LOAD_IMAGE
177 #endif
178 
179 #if defined(CONFIG_MACH_SUN9I)
180 #define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
181 #define CONFIG_SPL_MAX_SIZE		0x5fc0		/* ? KiB on sun9i */
182 #elif defined(CONFIG_MACH_SUN50I)
183 #define CONFIG_SPL_TEXT_BASE		0x10040		/* sram start+header */
184 #define CONFIG_SPL_MAX_SIZE		0x7fc0		/* 32 KiB on sun50i */
185 #else
186 #define CONFIG_SPL_TEXT_BASE		0x40		/* sram start+header */
187 #define CONFIG_SPL_MAX_SIZE		0x5fc0		/* 24KB on sun4i/sun7i */
188 #endif
189 
190 #ifndef CONFIG_ARM64
191 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
192 #endif
193 
194 #define CONFIG_SPL_PAD_TO		32768		/* decimal for 'dd' */
195 
196 #if defined(CONFIG_MACH_SUN9I) || defined(CONFIG_MACH_SUN50I)
197 /* FIXME: 40 KiB instead of 32 KiB ? */
198 #define LOW_LEVEL_SRAM_STACK		0x00018000
199 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
200 #else
201 /* end of 32 KiB in sram */
202 #define LOW_LEVEL_SRAM_STACK		0x00008000 /* End of sram */
203 #define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
204 #endif
205 
206 /* I2C */
207 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
208     defined CONFIG_SY8106A_POWER
209 #endif
210 
211 #if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
212     defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
213     defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
214 #define CONFIG_SYS_I2C
215 #define CONFIG_SYS_I2C_MVTWSI
216 #define CONFIG_SYS_I2C_SPEED		400000
217 #define CONFIG_SYS_I2C_SLAVE		0x7f
218 #endif
219 
220 #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
221 #define CONFIG_SYS_I2C_SOFT
222 #define CONFIG_SYS_I2C_SOFT_SPEED	50000
223 #define CONFIG_SYS_I2C_SOFT_SLAVE	0x00
224 /* We use pin names in Kconfig and sunxi_name_to_gpio() */
225 #define CONFIG_SOFT_I2C_GPIO_SDA	soft_i2c_gpio_sda
226 #define CONFIG_SOFT_I2C_GPIO_SCL	soft_i2c_gpio_scl
227 #ifndef __ASSEMBLY__
228 extern int soft_i2c_gpio_sda;
229 extern int soft_i2c_gpio_scl;
230 #endif
231 #define CONFIG_VIDEO_LCD_I2C_BUS	0 /* The lcd panel soft i2c is bus 0 */
232 #define CONFIG_SYS_SPD_BUS_NUM		1 /* And the axp209 i2c bus is bus 1 */
233 #else
234 #define CONFIG_SYS_SPD_BUS_NUM		0 /* The axp209 i2c bus is bus 0 */
235 #define CONFIG_VIDEO_LCD_I2C_BUS	-1 /* NA, but necessary to compile */
236 #endif
237 
238 /* PMU */
239 #if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
240     defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
241     defined CONFIG_SY8106A_POWER
242 #endif
243 
244 #ifndef CONFIG_CONS_INDEX
245 #define CONFIG_CONS_INDEX              1       /* UART0 */
246 #endif
247 
248 #ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
249 #if CONFIG_CONS_INDEX == 1
250 #ifdef CONFIG_MACH_SUN9I
251 #define OF_STDOUT_PATH		"/soc/serial@07000000:115200"
252 #else
253 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28000:115200"
254 #endif
255 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
256 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28400:115200"
257 #elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
258 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01c28800:115200"
259 #elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
260 #define OF_STDOUT_PATH		"/soc@01c00000/serial@01f02800:115200"
261 #else
262 #error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
263 #endif
264 #endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
265 
266 /* GPIO */
267 #define CONFIG_SUNXI_GPIO
268 
269 #ifdef CONFIG_VIDEO
270 /*
271  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
272  * to use as framebuffer. This must be a multiple of 4096.
273  */
274 #define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
275 
276 /* Do we want to initialize a simple FB? */
277 #define CONFIG_VIDEO_DT_SIMPLEFB
278 
279 #define CONFIG_VIDEO_SUNXI
280 
281 #define CONFIG_VIDEO_LOGO
282 #define CONFIG_VIDEO_STD_TIMINGS
283 #define CONFIG_I2C_EDID
284 #define VIDEO_LINE_LEN (pGD->plnSizeX)
285 
286 /* allow both serial and cfb console. */
287 /* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
288 
289 #endif /* CONFIG_VIDEO */
290 
291 /* Ethernet support */
292 #ifdef CONFIG_SUNXI_EMAC
293 #define CONFIG_PHY_ADDR		1
294 #define CONFIG_MII			/* MII PHY management		*/
295 #define CONFIG_PHYLIB
296 #endif
297 
298 #ifdef CONFIG_SUNXI_GMAC
299 #define CONFIG_PHY_GIGE			/* GMAC can use gigabit PHY	*/
300 #define CONFIG_PHY_ADDR		1
301 #define CONFIG_MII			/* MII PHY management		*/
302 #define CONFIG_PHY_REALTEK
303 #endif
304 
305 #ifdef CONFIG_USB_EHCI_HCD
306 #define CONFIG_USB_OHCI_NEW
307 #define CONFIG_USB_OHCI_SUNXI
308 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
309 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 1
310 #endif
311 
312 #ifdef CONFIG_USB_MUSB_SUNXI
313 #define CONFIG_USB_MUSB_PIO_ONLY
314 #endif
315 
316 #ifdef CONFIG_USB_MUSB_GADGET
317 #define CONFIG_USB_FUNCTION_FASTBOOT
318 #define CONFIG_USB_FUNCTION_MASS_STORAGE
319 #endif
320 
321 #ifdef CONFIG_USB_FUNCTION_FASTBOOT
322 #define CONFIG_CMD_FASTBOOT
323 #define CONFIG_FASTBOOT_BUF_ADDR	CONFIG_SYS_LOAD_ADDR
324 #define CONFIG_FASTBOOT_BUF_SIZE	0x2000000
325 #define CONFIG_ANDROID_BOOT_IMAGE
326 
327 #define CONFIG_FASTBOOT_FLASH
328 
329 #ifdef CONFIG_MMC
330 #define CONFIG_FASTBOOT_FLASH_MMC_DEV	0
331 #endif
332 #endif
333 
334 #ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
335 #endif
336 
337 #ifdef CONFIG_USB_KEYBOARD
338 #define CONFIG_PREBOOT
339 #define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
340 #endif
341 
342 #if !defined CONFIG_ENV_IS_IN_MMC && \
343     !defined CONFIG_ENV_IS_IN_NAND && \
344     !defined CONFIG_ENV_IS_IN_FAT && \
345     !defined CONFIG_ENV_IS_IN_SPI_FLASH
346 #define CONFIG_ENV_IS_NOWHERE
347 #endif
348 
349 #define CONFIG_MISC_INIT_R
350 
351 #ifndef CONFIG_SPL_BUILD
352 #include <config_distro_defaults.h>
353 
354 #ifdef CONFIG_ARM64
355 /*
356  * Boards seem to come with at least 512MB of DRAM.
357  * The kernel should go at 512K, which is the default text offset (that will
358  * be adjusted at runtime if needed).
359  * There is no compression for arm64 kernels (yet), so leave some space
360  * for really big kernels, say 256MB for now.
361  * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
362  * Align the initrd to a 2MB page.
363  */
364 #define KERNEL_ADDR_R	__stringify(SDRAM_OFFSET(0080000))
365 #define FDT_ADDR_R	__stringify(SDRAM_OFFSET(FA00000))
366 #define SCRIPT_ADDR_R	__stringify(SDRAM_OFFSET(FC00000))
367 #define PXEFILE_ADDR_R	__stringify(SDRAM_OFFSET(FD00000))
368 #define RAMDISK_ADDR_R	__stringify(SDRAM_OFFSET(FE00000))
369 
370 #else
371 /*
372  * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
373  * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
374  * 1M script, 1M pxe and the ramdisk at the end.
375  */
376 
377 #define KERNEL_ADDR_R  __stringify(SDRAM_OFFSET(2000000))
378 #define FDT_ADDR_R     __stringify(SDRAM_OFFSET(3000000))
379 #define SCRIPT_ADDR_R  __stringify(SDRAM_OFFSET(3100000))
380 #define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
381 #define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
382 #endif
383 
384 #define MEM_LAYOUT_ENV_SETTINGS \
385 	"bootm_size=0xa000000\0" \
386 	"kernel_addr_r=" KERNEL_ADDR_R "\0" \
387 	"fdt_addr_r=" FDT_ADDR_R "\0" \
388 	"scriptaddr=" SCRIPT_ADDR_R "\0" \
389 	"pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
390 	"ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
391 
392 #define DFU_ALT_INFO_RAM \
393 	"dfu_alt_info_ram=" \
394 	"kernel ram " KERNEL_ADDR_R " 0x1000000;" \
395 	"fdt ram " FDT_ADDR_R " 0x100000;" \
396 	"ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
397 
398 #ifdef CONFIG_MMC
399 #define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
400 #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
401 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func) func(MMC, mmc, 1)
402 #else
403 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
404 #endif
405 #else
406 #define BOOT_TARGET_DEVICES_MMC(func)
407 #define BOOT_TARGET_DEVICES_MMC_EXTRA(func)
408 #endif
409 
410 #ifdef CONFIG_AHCI
411 #define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
412 #else
413 #define BOOT_TARGET_DEVICES_SCSI(func)
414 #endif
415 
416 #ifdef CONFIG_USB_STORAGE
417 #define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
418 #else
419 #define BOOT_TARGET_DEVICES_USB(func)
420 #endif
421 
422 /* FEL boot support, auto-execute boot.scr if a script address was provided */
423 #define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
424 	"bootcmd_fel=" \
425 		"if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
426 			"echo '(FEL boot)'; " \
427 			"source ${fel_scriptaddr}; " \
428 		"fi\0"
429 #define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
430 	"fel "
431 
432 #define BOOT_TARGET_DEVICES(func) \
433 	func(FEL, fel, na) \
434 	BOOT_TARGET_DEVICES_MMC(func) \
435 	BOOT_TARGET_DEVICES_MMC_EXTRA(func) \
436 	BOOT_TARGET_DEVICES_SCSI(func) \
437 	BOOT_TARGET_DEVICES_USB(func) \
438 	func(PXE, pxe, na) \
439 	func(DHCP, dhcp, na)
440 
441 #ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
442 #define BOOTCMD_SUNXI_COMPAT \
443 	"bootcmd_sunxi_compat=" \
444 		"setenv root /dev/mmcblk0p3 rootwait; " \
445 		"if ext2load mmc 0 0x44000000 uEnv.txt; then " \
446 			"echo Loaded environment from uEnv.txt; " \
447 			"env import -t 0x44000000 ${filesize}; " \
448 		"fi; " \
449 		"setenv bootargs console=${console} root=${root} ${extraargs}; " \
450 		"ext2load mmc 0 0x43000000 script.bin && " \
451 		"ext2load mmc 0 0x48000000 uImage && " \
452 		"bootm 0x48000000\0"
453 #else
454 #define BOOTCMD_SUNXI_COMPAT
455 #endif
456 
457 #include <config_distro_bootcmd.h>
458 
459 #ifdef CONFIG_USB_KEYBOARD
460 #define CONSOLE_STDIN_SETTINGS \
461 	"preboot=usb start\0" \
462 	"stdin=serial,usbkbd\0"
463 #else
464 #define CONSOLE_STDIN_SETTINGS \
465 	"stdin=serial\0"
466 #endif
467 
468 #ifdef CONFIG_VIDEO
469 #define CONSOLE_STDOUT_SETTINGS \
470 	"stdout=serial,vga\0" \
471 	"stderr=serial,vga\0"
472 #else
473 #define CONSOLE_STDOUT_SETTINGS \
474 	"stdout=serial\0" \
475 	"stderr=serial\0"
476 #endif
477 
478 #define CONSOLE_ENV_SETTINGS \
479 	CONSOLE_STDIN_SETTINGS \
480 	CONSOLE_STDOUT_SETTINGS
481 
482 #define CONFIG_EXTRA_ENV_SETTINGS \
483 	CONSOLE_ENV_SETTINGS \
484 	MEM_LAYOUT_ENV_SETTINGS \
485 	DFU_ALT_INFO_RAM \
486 	"fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
487 	"console=ttyS0,115200\0" \
488 	BOOTCMD_SUNXI_COMPAT \
489 	BOOTENV
490 
491 #else /* ifndef CONFIG_SPL_BUILD */
492 #define CONFIG_EXTRA_ENV_SETTINGS
493 #endif
494 
495 #endif /* _SUNXI_COMMON_CONFIG_H */
496