| f72827b8 | 30-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(mt8186): remove unused files in drivers/mcdi" into integration
|
| bc714baf | 30-Dec-2021 |
Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> |
fix(mt8186): remove unused files in drivers/mcdi
We don't use mbox drivers which are implemented in these files for
mcdi, so remove related files from mcdi folder.
TEST=build pass
BUG=b:202871018
fix(mt8186): remove unused files in drivers/mcdi
We don't use mbox drivers which are implemented in these files for
mcdi, so remove related files from mcdi folder.
TEST=build pass
BUG=b:202871018
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: Idea5ebe5b25f91066ebd653cdcdafe65ca292b0f
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| c5ee8588 | 23-Dec-2021 |
Wing Li <wingers@google.com> |
fix(ufs): delete call to inv_dcache_range for utrd
The utrd struct is allocated on the stack by ufs_check_resp's caller.
Invalidating the utrd struct is unnecessary since it's only read from,
and ca
fix(ufs): delete call to inv_dcache_range for utrd
The utrd struct is allocated on the stack by ufs_check_resp's caller.
Invalidating the utrd struct is unnecessary since it's only read from,
and can cause other values stored on the stack (e.g. link register) to
be inadvertently invalidated.
Change-Id: Icd455b52beb2677fafc083d68d0bfa0645b7194b
Signed-off-by: Wing Li <wingers@google.com>
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| f2b2cc14 | 27-Dec-2021 |
Andre Przywara <andre.przywara@arm.com> |
docs(allwinner): update SoC list and build options
Our list of possible Allwinner build targets was missing the newly
introduced R329 support. Fix that by adding a table with maps the SoC
names to t
docs(allwinner): update SoC list and build options
Our list of possible Allwinner build targets was missing the newly
introduced R329 support. Fix that by adding a table with maps the SoC
names to the build target names.
Also add some explanation about the recently introduced PSCI power
management providers.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Icf5e304562c3082552bf08d7b26904caf9074936
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| 67412e4d | 01-Nov-2021 |
Andre Przywara <andre.przywara@arm.com> |
feat(allwinner): allow to skip PMIC regulator setup
For somewhat historical reasons we are doing some initial PMIC regulator
setup in BL31, as U-Boot does not (yet) have a PMIC driver. This worked
f
feat(allwinner): allow to skip PMIC regulator setup
For somewhat historical reasons we are doing some initial PMIC regulator
setup in BL31, as U-Boot does not (yet) have a PMIC driver. This worked
fine so far, but there is at least one board (OrangePi 3) that gets upset,
because the Ethernet PHY needs some *coordinated* bringup of *two*
regulators.
To avoid custom hacks, let's introduce a build option to keep doing the
regulator setup in TF-A. Defining SUNXI_SETUP_REGULATORS to 0 will break
support for some devices on some boards in U-Boot (Ethernet and HDMI),
but will allow to bring up the OrangePi 3 in Linux correctly. We keep
the default at 1 to not change the behaviour for all other boards.
After U-Boot gained proper PMIC support at some point in the future, we
will probably change the default to 0, to get rid of the less optimal
PMIC code in TF-A.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ie8e2583d0396f6eeaae8ffe6b6190f27db63e2a7
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| aa616990 | 27-Dec-2021 |
Andre Przywara <andre.przywara@arm.com> |
docs(allwinner): add SUNXI_SETUP_REGULATORS build option
Document the newly introduced SUNXI_SETUP_REGULATORS build option, that
allows to disable PMIC regulator setup at build time.
Signed-off-by:
docs(allwinner): add SUNXI_SETUP_REGULATORS build option
Document the newly introduced SUNXI_SETUP_REGULATORS build option, that
allows to disable PMIC regulator setup at build time.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Change-Id: Ie5fb0b7220426b67cfffc95df4cabb31a6ec174a
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| a006606f | 24-Dec-2021 |
Joanna Farley <joanna.farley@arm.com> |
Merge "feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX" into integration |
| 93b153b5 | 23-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st_regulator" into integration
* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulat
Merge changes from topic "st_regulator" into integration
* changes:
feat(st-sdmmc2): manage cards power cycle
feat(stm32mp1): register fixed regulator
feat(st-drivers): introduce fixed regulator driver
refactor(st): update CPU and VDD voltage get
refactor(stm32mp1-fdts): update regulator description
refactor(st-pmic): use regulator framework for DDR init
feat(st-pmic): register the PMIC to regulator framework
refactor(st-pmic): split initialize_pmic()
feat(stm32mp1): add regulator framework compilation
feat(regulator): add a regulator framework
feat(stpmic1): add new services
feat(stpmic1): add USB OTG regulators
refactor(st-pmic): improve driver usage
refactor(stpmic1): set stpmic1_is_regulator_enabled() as boolean
refactor(stm32mp1): re-order drivers init
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| 91a8bd66 | 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(sve): disable ENABLE_SVE_FOR_NS for AARCH32" into integration |
| dd14d0f6 | 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(fiptool): respect OPENSSL_DIR" into integration |
| 9697e459 | 22-Dec-2021 |
Bipin Ravi <bipin.ravi@arm.com> |
Merge "fix(trp): Distinguish between cold and warm boot" into integration |
| b3c41015 | 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "uart1_console" into integration
* changes:
feat(versal): add UART1 as console
feat(zynqmp): add uart1 as console |
| 0ca4b4b7 | 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "clock_framework" into integration
* changes:
feat(st): use newly introduced clock framework
feat(clk): add a minimal clock framework |
| ed780b0b | 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I41001484,Ic734696a,I84741535,I85aaaf3a,Ibd5423b7, ... into integration
* changes:
feat(plat/mediatek/mt8186): add reboot function for PSCI
feat(plat/mdeiatek/mt8186): add power-of
Merge changes I41001484,Ic734696a,I84741535,I85aaaf3a,Ibd5423b7, ... into integration
* changes:
feat(plat/mediatek/mt8186): add reboot function for PSCI
feat(plat/mdeiatek/mt8186): add power-off function for PSCI
feat(plat/mediatek/mt8186): apply erratas for MT8186
feat(plat/mediatek/mt8186): add MCDI drivers
feat(plat/mediatek/mt8186): add CPU hotplug
feat(plat/mediatek/mt8186): add RTC drivers
fix(plat/mediatek/mt8186): extend MMU region size
feat(plat/mediatek/mt8186): add DCM driver
feat(plat/mediatek/mt8186): add pinctrl support
feat(plat/mediatek/mt8186): add sys_cirq support
feat(plat/mediatek/mt8186): initialize GIC
feat(plat/mediatek/mt8186): add SiP service
feat(plat/mediatek/mt8186): add pwrap and pmic driver
feat(plat/mediatek/mt8186): initialize delay_timer
feat(plat/mediatek/mt8186): initialize systimer
feat(plat/mediatek/mt8186): add EMI MPU basic driver
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| d76346b9 | 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(fiptool): avoid packing the zero size images in the FIP" into integration |
| b48121b6 | 22-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(errata): workaround for Cortex X2 erratum 2058056" into integration |
| 258bef91 | 10-May-2019 |
Yann Gautier <yann.gautier@st.com> |
feat(st-sdmmc2): manage cards power cycle
To correctly initialize the MMC devices, a power cycle is required.
For this we need to:
- disable vmmc-supply regulator
- make the power cycle required for
feat(st-sdmmc2): manage cards power cycle
To correctly initialize the MMC devices, a power cycle is required.
For this we need to:
- disable vmmc-supply regulator
- make the power cycle required for SDMMC2 peripheral
- enable regulators
Change-Id: I2be6d9082d1cc4c864a82cf2c31ff8522e2d31a2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 967a8e63 | 29-Jan-2021 |
Pascal Paillet <p.paillet@st.com> |
feat(stm32mp1): register fixed regulator
Register fixed regulator in BL2.
Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann G
feat(stm32mp1): register fixed regulator
Register fixed regulator in BL2.
Change-Id: I24292f549b2cd24fb717fbb68eb95af7aa68e3b9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 5d6a2646 | 20-Jan-2021 |
Pascal Paillet <p.paillet@st.com> |
feat(st-drivers): introduce fixed regulator driver
Fixed regulator is mainly used when no pmic is available
Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474
Signed-off-by: Pascal Paillet <p.pai
feat(st-drivers): introduce fixed regulator driver
Fixed regulator is mainly used when no pmic is available
Change-Id: Ib6a998684bcb055ba95a093bee563372d9051474
Signed-off-by: Pascal Paillet <p.paillet@st.com>
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| c39c658e | 17-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
refactor(st): update CPU and VDD voltage get
Use regulator framework to get CPU and VDD power supplies.
Change-Id: Ice745fb21ff10e71ef811e747165499c2e19253e
Signed-off-by: Pascal Paillet <p.paillet
refactor(st): update CPU and VDD voltage get
Use regulator framework to get CPU and VDD power supplies.
Change-Id: Ice745fb21ff10e71ef811e747165499c2e19253e
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 67d95409 | 07-Jan-2021 |
Pascal Paillet <p.paillet@st.com> |
refactor(stm32mp1-fdts): update regulator description
Update regulator description to match with pmic driver updates.
vref_ddr does not support over-current protection.
vtt_ddr is set to sink source
refactor(stm32mp1-fdts): update regulator description
Update regulator description to match with pmic driver updates.
vref_ddr does not support over-current protection.
vtt_ddr is set to sink source mode.
Change-Id: I725f35b091ca8c230994c2b5f81693ebc97bf4aa
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 0ba71ac9 | 15-Dec-2020 |
Pascal Paillet <p.paillet@st.com> |
refactor(st-pmic): use regulator framework for DDR init
Use regulator framework for DDR initialization.
Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31
Signed-off-by: Pascal Paillet <p.paillet
refactor(st-pmic): use regulator framework for DDR init
Use regulator framework for DDR initialization.
Change-Id: I9dffe499ca12cdc35904de7daf2dda821b267a31
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
show more ...
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| 85fb175b | 27-Sep-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(st-pmic): register the PMIC to regulator framework
Register the PMIC to the regulator framework.
Change-Id: Ic825a8ef08505316db3dbd5944d62ea907f73c4a
Signed-off-by: Pascal Paillet <p.paillet@s
feat(st-pmic): register the PMIC to regulator framework
Register the PMIC to the regulator framework.
Change-Id: Ic825a8ef08505316db3dbd5944d62ea907f73c4a
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| ae7792e0 | 18-Nov-2019 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after init
refactor(st-pmic): split initialize_pmic()
print_pmic_info_and_debug() prints the PMIC version ID and displays
regulator information if debug is enabled.
It is under DEBUG flag and called after initialize_pmic() in BL2.
Change-Id: Ib81a625740b7ec6abb49cfca05e44c69efaa4718
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
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| bba9fdee | 15-Dec-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add regulator framework compilation
Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.
Change-Id: I9dc7a0a4c4f5a23d9bedda368d4
feat(stm32mp1): add regulator framework compilation
Add required macro PLAT_NB_RDEVS in platform code, and update
platform.mk to compile regulator framework.
Change-Id: I9dc7a0a4c4f5a23d9bedda368d407612c9cd21cd
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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