| 1c0612d8 | 09-Jun-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "chore: remove unused and undefined function" into integration |
| ee6d04d4 | 06-Jun-2023 |
Kathleen Capella <kathleen.capella@arm.com> |
feat(cpus): conform DSU errata to errata framework PCS
Errata framework expects workarounds to clobber x0 to x8 and checker functions to clobber x0-x4.
Update DSU errata functions to adhere to the
feat(cpus): conform DSU errata to errata framework PCS
Errata framework expects workarounds to clobber x0 to x8 and checker functions to clobber x0-x4.
Update DSU errata functions to adhere to the standard, which is documented here: https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/19295.
Signed-off-by: Kathleen Capella <kathleen.capella@arm.com> Change-Id: Ie0e492473ab8b2bee4335b6b1db00796fabdd59d
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| c161772f | 08-Jun-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge "refactor(el3-spmc): add emad_advance()" into integration |
| d0e3053c | 07-Jun-2023 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(memmap): reintroduce support for GNU map files
The intial patch stack only supported ELF files, which proved particularly problematic when dealing with incomplete builds (i.e. build didn't compl
fix(memmap): reintroduce support for GNU map files
The intial patch stack only supported ELF files, which proved particularly problematic when dealing with incomplete builds (i.e. build didn't complete due to linker errors). This adds support for GNU map files. Most analysis performed by the tool should be possible with map files alone.
Change-Id: I89f775a98efc5aef6671a17d0e6e973df555a6fa Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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| 919e25e9 | 08-Jun-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "docs: add detail to assembly language guideline" into integration |
| c64681d0 | 08-Jun-2023 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(aarch64): add stack debug information to assembly routines" into integration |
| 1b4d9987 | 08-Jun-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "fix(doc): match boot-order size to implementation" into integration |
| f1a32f49 | 07-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "chore(xilinx): replace ATF with TFA" into integration |
| f6bf4d6b | 07-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "hm/memmap-feat" into integration
* changes: feat(memmap): add topological memory view feat(memmap): add tabular memory use data |
| d4affdce | 07-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(stm32mp1): add void entry in plat_def_toc_entries" into integration |
| c58a9c36 | 07-Jun-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(zynqmp): fix sdei arm_validate_ns_entrypoint()" into integration |
| 3efee73d | 02-Jun-2023 |
Michal Simek <michal.simek@amd.com> |
fix(zynqmp): fix prepare_dtb() memory description
The commit 8ce2fbffe37d ("fix(zynqmp): fix BLXX memory limits for user defined values") fixed logic around BL31_LIMIT but didn't update prepare_dtb(
fix(zynqmp): fix prepare_dtb() memory description
The commit 8ce2fbffe37d ("fix(zynqmp): fix BLXX memory limits for user defined values") fixed logic around BL31_LIMIT but didn't update prepare_dtb() which is also using +1 logic.
Change-Id: Ia6de10d992a552ca9cfa39c14261b0f94cda95ec Signed-off-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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| 6e1ae307 | 07-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(qemu): fix 32-bit builds with stack protector" into integration |
| ab23061e | 07-Jun-2023 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "bk/clearups" into integration
* changes: chore(rme): add make rule for SPD=spmd chore(bl1): remove redundant bl1_arch_next_el_setup chore(docs): remove control regist
Merge changes from topic "bk/clearups" into integration
* changes: chore(rme): add make rule for SPD=spmd chore(bl1): remove redundant bl1_arch_next_el_setup chore(docs): remove control register setup section chore(pauth): remove redundant pauth_disable_el3() call
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| 3b3c70a4 | 07-Jun-2023 |
Michal Simek <michal.simek@amd.com> |
fix(zynqmp): fix sdei arm_validate_ns_entrypoint()
Don't use BL31_LIMIT macro for validation logic directly but clearly mark BL31_LIMIT as 64bit address to avoid compilation error when -Werror=logic
fix(zynqmp): fix sdei arm_validate_ns_entrypoint()
Don't use BL31_LIMIT macro for validation logic directly but clearly mark BL31_LIMIT as 64bit address to avoid compilation error when -Werror=logical-op is passed.
Likely caused by ZYNQMP_ATF_MEM_BASE + ZYNQMP_ATF_MEM_SIZE is in 64bit logic 0x100000000 and compiler handles it as 32bit value. That's why error is shown.
Use uint64_t variable for limit and also for base.
Here is command line to replicate this issue: make realclean; make -j PLAT=zynqmp DEBUG=1 RESET_TO_BL31=1 \ SPD=tspd SDEI_SUPPORT=1 ZYNQMP_ATF_MEM_BASE=0xFFFC0000 \ ZYNQMP_ATF_MEM_SIZE=0x00040000 all -Werror=logical-op
Also error which is coming: plat/xilinx/zynqmp/zynqmp_sdei.c: In function 'arm_validate_ns_entrypoint': plat/xilinx/zynqmp/zynqmp_sdei.c:19:40: error: logical 'or' of collectively exhaustive tests is always true [-Werror=logical-op] 19 | return (entrypoint < BL31_BASE || entrypoint > BL31_LIMIT) ? 0 : -1;
Change-Id: Ie1f1b4d2cd94b977aebb72786ecace0b062da418 Signed-off-by: Michal Simek <michal.simek@amd.com>
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| 396ea00a | 06-Jun-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes I907f3862,Ie749ff06,If8da2bb1,I457deb0b into integration
* changes: fix(el3-spmc): validate shmem descriptor alignment refactor(el3-spmc): avoid using EINVAL fix(el3-spmc): avoid
Merge changes I907f3862,Ie749ff06,If8da2bb1,I457deb0b into integration
* changes: fix(el3-spmc): validate shmem descriptor alignment refactor(el3-spmc): avoid using EINVAL fix(el3-spmc): avoid descriptor size calc overflow fix(el3-spmc): use uint64_t for 64-bit type
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| 201e3c78 | 06-Jun-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "chore(fconf): rename last occurences of set_fw_config_info()" into integration |
| 01c1b3e1 | 25-Feb-2023 |
Raghu Krishnamurthy <raghu.ncstate@gmail.com> |
chore: remove unused and undefined function
Clean up unused function
Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com> Change-Id: Ib761d04070f7eb7e0dddad4ad885ce11f82582b8 |
| e1c0a472 | 06-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "dummy_feat_aa32" into integration
* changes: feat(cpufeat): deny AArch64-only features when building for AArch32 feat(cpufeat): add AArch32 PAN detection support |
| dbe4765c | 06-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "refactor(el3-spmc): avoid unneeded function call" into integration |
| f4c91363 | 06-Jun-2023 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes Ia052c7f9,If598680a,Ieae11722 into integration
* changes: refactor(el3-spmc): move function call out of loop refactor(el3-spmc): crash instead of reading OOB fix(el3-spmc): preve
Merge changes Ia052c7f9,If598680a,Ieae11722 into integration
* changes: refactor(el3-spmc): move function call out of loop refactor(el3-spmc): crash instead of reading OOB fix(el3-spmc): prevent total_page_count overflow
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| 1d64109e | 06-Jun-2023 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "st-fixes" into integration
* changes: fix(spi-nand): add Quad Enable management fix(st-clock): disabling CKPER clock is not functional on stm32mp13 fix(st-uart): skip
Merge changes from topic "st-fixes" into integration
* changes: fix(spi-nand): add Quad Enable management fix(st-clock): disabling CKPER clock is not functional on stm32mp13 fix(st-uart): skip console flush if UART is disabled fix(st): flush UART at the end of uart_read() fix(stm32mp1): use the BSEC nodes compatible for stm32mp13 fix(stm32mp13-fdts): correct the BSEC nodes compatible fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files fix(stm32mp1): properly check PSCI functions return
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| 8dadc1e2 | 06-Jun-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
chore(fconf): rename last occurences of set_fw_config_info()
set_fw_config_info() interface got renamed into set_config_info() as part of commit f441718936a6b72583d03eebf8057bbf29446989 ("lib/fconf:
chore(fconf): rename last occurences of set_fw_config_info()
set_fw_config_info() interface got renamed into set_config_info() as part of commit f441718936a6b72583d03eebf8057bbf29446989 ("lib/fconf: Update 'set_fw_config_info' function"). Rename a few left-overs of the old name.
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Change-Id: I119719cd7f3ba544e0c4c438e5341d35c7b5bdc2
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| e14b7acb | 06-Jun-2023 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "refactor(fvp): nv ctr addr static helper function" into integration |
| c8be2240 | 26-Apr-2023 |
Prasad Kummari <prasad.kummari@amd.com> |
chore(xilinx): replace ATF with TFA
Since the Arm Trusted Firmware(ATF) has been renamed to Trusted Firmware-A (TF-A), replace all the instances of ATF from code comments, macros, variables and func
chore(xilinx): replace ATF with TFA
Since the Arm Trusted Firmware(ATF) has been renamed to Trusted Firmware-A (TF-A), replace all the instances of ATF from code comments, macros, variables and functions to TF-A.
Change-Id: Iab448d96158612a3effb4e49943f8d6cb43aaad5 Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>
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