| 4569a496 | 04-Apr-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(arm): resolve build issue with ARM_ROTPK_LOCATION=regs option
Fix the broken build when using the ARM_ROTPK_LOCATION=regs option.
Change-Id: Ieaa7baebd86448d198a1b9d2149a3490700b45d3 Signed-off
fix(arm): resolve build issue with ARM_ROTPK_LOCATION=regs option
Fix the broken build when using the ARM_ROTPK_LOCATION=regs option.
Change-Id: Ieaa7baebd86448d198a1b9d2149a3490700b45d3 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 34d7f196 | 17-Mar-2025 |
Boyan Karatotev <boyan.karatotev@arm.com> |
perf(libc): use builtin implementations where possible
When conditions are right, eg a small memcpy of a known size and alignment, the compiler may know of a sequence that is optimal for the given c
perf(libc): use builtin implementations where possible
When conditions are right, eg a small memcpy of a known size and alignment, the compiler may know of a sequence that is optimal for the given constraints and inline it. If the compiler doesn't find one, it will emit a call to the generic function (in the libc) which will implement this in the most generic and unconstrained manner. That generic function is rarely the most optimal when constraints are known.
So give the compiler a chance to do this. Replace calls to libc functions that have builtins to the builtin and keep the generic implementation if it decides to emit a call anyway.
And example of this in action is usage of FEAT_MOPS. When the compiler is aware of the feature (-march=armv8.8-a) then it will emit the 3 MOPS instructions instead of calls to our memcpy() and memset() implementations.
Change-Id: I9860cfada1d941b613ebd4da068e9992c387952e Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
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| 307a5333 | 03-Apr-2025 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
fix(arm): resolve misra rule R11.6 violation
Fixed below MISRA violation: - MISRA violation: MC3R1.R11.6: - A cast shall not be performed between a pointer to void and an arithmetic data type.
fix(arm): resolve misra rule R11.6 violation
Fixed below MISRA violation: - MISRA violation: MC3R1.R11.6: - A cast shall not be performed between a pointer to void and an arithmetic data type. (i.e cast from integer to void*) - Fix: - cast via portable and misra compliant type "uintptr_t" and use 0U instead of NULL for comparisons.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Ie3a7561d9a254027c5364485a1d72fc1320dfcad
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| 08f8c0a5 | 03-Apr-2025 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
feat(mbedtls): update mbedtls to version 3.6.3
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Icad24203a36cb7e5b0a6f2275cb3b5346dcd148a |
| 247ce406 | 03-Apr-2025 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
docs(prerequisites): update mbedtls to v3.6.3
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I62bc0fd6e40a38143ad3118a2e8e8d63c728a675 |
| 9753238f | 14-Mar-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(drtm): update DLME data header with actual Event Log size
The definition of `dlme_tpm_log_size` has been revised to represent the actual Event Log data size instead of the fixed minimum of 64KB
feat(drtm): update DLME data header with actual Event Log size
The definition of `dlme_tpm_log_size` has been revised to represent the actual Event Log data size instead of the fixed minimum of 64KB. This change will be reflected in the upcoming DRTM specification update.
Note: This change requires a corresponding update to the ACS DRTM app in CI.
Change-Id: I967b5a372b283abd46409685d7266ffa60c142b0 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| 10639cc9 | 03-Apr-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "xlnx_fix_gen_uniq_var" into integration
* changes: fix(psci): avoid altering function parameters fix(services): avoid altering function parameters fix(common): ignore
Merge changes from topic "xlnx_fix_gen_uniq_var" into integration
* changes: fix(psci): avoid altering function parameters fix(services): avoid altering function parameters fix(common): ignore the unused function return value fix(psci): modify variable conflicting with external function fix(delay-timer): create unique variable name
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| 29de2aa4 | 03-Apr-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: feat(tc): port BL31-BL33 interface to firmware handoff framework feat(tc): port BL2-BL31 interface to firmware handoff fra
Merge changes from topic "jc/tc_fw_handoff" into integration
* changes: feat(tc): port BL31-BL33 interface to firmware handoff framework feat(tc): port BL2-BL31 interface to firmware handoff framework feat(tc): port BL1-BL2 interface to firmware handoff framework
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| 25a6bcd5 | 01-Mar-2025 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
feat(tc): port BL31-BL33 interface to firmware handoff framework
Adding support for this framework at the handoff boundary between firmware stage BL31 and BL33 on TC.
Signed-off-by: Jayanth Dodderi
feat(tc): port BL31-BL33 interface to firmware handoff framework
Adding support for this framework at the handoff boundary between firmware stage BL31 and BL33 on TC.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Ia6cd29c8b6cdda0a127a3bac02f6fa1dcfc07151
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| 2a36dee8 | 01-Mar-2025 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
feat(tc): port BL2-BL31 interface to firmware handoff framework
Adding support for this framework at the handoff boundary between firmware stage BL2 and BL31 on TC.
Signed-off-by: Jayanth Dodderi C
feat(tc): port BL2-BL31 interface to firmware handoff framework
Adding support for this framework at the handoff boundary between firmware stage BL2 and BL31 on TC.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: I8e29b859e57a732e53f7532a5869ed4c8665b161
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| 93c50ae6 | 01-Mar-2025 |
Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> |
feat(tc): port BL1-BL2 interface to firmware handoff framework
The firmware handoff framework, is a light weight mechanism for sharing information between bootloader stages. Adding support for this
feat(tc): port BL1-BL2 interface to firmware handoff framework
The firmware handoff framework, is a light weight mechanism for sharing information between bootloader stages. Adding support for this framework at the handoff boundary between firmware stage BL1 and BL2 on TC.
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Change-Id: Iae13adbcdd6ebbdcc61d04e017655c6b8d715ea0
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| 60a082ca | 03-Apr-2025 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "fix(build): enable fp during fp save/restore" into integration |
| 26cc2854 | 24-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(libc): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a diff
fix(libc): typecast operands to match data type
This corrects the MISRA violation C2012-10.3: The value of an expression shall not be assigned to an object with a narrower essential type or of a different essential type category. The condition is explicitly checked against 0U, appending 'U' and typecasting for unsigned comparison.
In spite of generic guidance for 3rd party libraries (https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-style.html#misra-compliance) libc contains some MISRA-C fixes done by commit d5ccb754af86 ("libc: Fix some MISRA defects") in 2021. Also from history it is not clear where libc is coming from that's why there is no way to fix violation in base library.
Change-Id: Ibad03a758001b3a7779b488ee5e19c9ceee51134 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| 60e5aee1 | 25-Apr-2024 |
Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> |
fix(libc): add missing curly braces
This corrects the MISRA violation C2012-15.6: The body of an iteration-statement or a selection-statement shall be a compound-statement. Enclosed statement body w
fix(libc): add missing curly braces
This corrects the MISRA violation C2012-15.6: The body of an iteration-statement or a selection-statement shall be a compound-statement. Enclosed statement body within the curly braces.
In spite of generic guidance for 3rd party libraries (https://trustedfirmware-a.readthedocs.io/en/latest/process/coding-style.html#misra-compliance) libc contains some MISRA-C fixes done by commit d5ccb754af86 ("libc: Fix some MISRA defects") in 2021. Also from history it is not clear where libc is coming from that's why there is no way to fix violation in base library.
Change-Id: I9007cfc8019e885cd294dbbd68e6b3f65a6071ba Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
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| 5141de14 | 16-Jan-2025 |
Per Larsen <perlarsen@google.com> |
fix(build): enable fp during fp save/restore
Newer compilers such as clang/LLVM 19 flag uses of floating point instructions when the architecture does not allow for it. We can temporarily enable the
fix(build): enable fp during fp save/restore
Newer compilers such as clang/LLVM 19 flag uses of floating point instructions when the architecture does not allow for it. We can temporarily enable the use of floating point operations where it it is safe and necessary for the build to succeed.
Change-Id: I1a832f846915c35792684906c94aef81c1f72d63 Signed-off-by: Andrei Homescu <ahomescu@google.com> Signed-off-by: Per Larsen <perlarsen@google.com>
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| e83738c0 | 02-Apr-2025 |
Lauren Wehrmeister <lauren.wehrmeister@arm.com> |
Merge "fix(bl1): prevent null pointer dereference" into integration |
| 0c9b38b6 | 02-Apr-2025 |
Yann Gautier <yann.gautier@st.com> |
Merge "fix(tools): change data type to size_t for doimage" into integration |
| aac3e34f | 01-Apr-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge changes I2c33105f,I010b3932 into integration
* changes: feat(stm32mp25-fdts): update 2GB DDR configs feat(stm32mp25-fdts): enable WDQS for LPDDR4 |
| 2d3b44e3 | 01-Apr-2025 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
fix(bl1): prevent null pointer dereference
Added an assertion to ensure ptr is not NULL before dereferencing it. This prevents potential null pointer dereference issues detected by Coverity.
Change
fix(bl1): prevent null pointer dereference
Added an assertion to ensure ptr is not NULL before dereferencing it. This prevents potential null pointer dereference issues detected by Coverity.
Change-Id: I2e3325cd7cbdf141959bacd6135461be24ae6169 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
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| fbf65557 | 29-Dec-2024 |
Jaiprakash Singh <jaiprakashs@marvell.com> |
fix(tools): change data type to size_t for doimage
In image_encrypt function, vulnerability arises due to a mismatch between unsigned and signed integer types. When a large unsigned integer is retur
fix(tools): change data type to size_t for doimage
In image_encrypt function, vulnerability arises due to a mismatch between unsigned and signed integer types. When a large unsigned integer is returned by strlen and stored into signed integer k, the value represented is a large negative integer. This bypasses the subsequent check against AES_BLOCK_SZ and allows a buffer overflow to happen at memcpy.
Similar, vulnerability issue is fixed in function verify_and_copy_file_name_entry.
Change-Id: I658521c1eec1c79933ba8082ba507df04d174e52 Signed-off-by: Jaiprakash Singh <jaiprakashs@marvell.com>
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| 388cb47c | 01-Apr-2025 |
Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> |
feat(stm32mp25-fdts): update 2GB DDR configs
Update the 2GB LpDDR4 and DDR4 DT settings.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> Change-Id: I2c33105f31364ff15a66a0749b2400dd6
feat(stm32mp25-fdts): update 2GB DDR configs
Update the 2GB LpDDR4 and DDR4 DT settings.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> Change-Id: I2c33105f31364ff15a66a0749b2400dd69db33e3
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| 29917d3a | 26-Feb-2025 |
Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> |
feat(stm32mp25-fdts): enable WDQS for LPDDR4
Enable WDQS extension mode requested by some device manufacturers. No impact on other devices.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st
feat(stm32mp25-fdts): enable WDQS for LPDDR4
Enable WDQS extension mode requested by some device manufacturers. No impact on other devices.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> Change-Id: I010b3932dd363c03e34b879fd68adae6dd28c27a
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| d59dd96d | 01-Apr-2025 |
Boerge Struempfel <boerge.struempfel@gmail.com> |
feat(stm32mp2): use USART1 for debug console on ultra-fly boards
This commit configures the debug console to use USART1 for ultra-fly boards, ensuring the early console works as expected on these bo
feat(stm32mp2): use USART1 for debug console on ultra-fly boards
This commit configures the debug console to use USART1 for ultra-fly boards, ensuring the early console works as expected on these boards.
These changes are specific to the ultra-fly boards and do not affect any other boards.
Change-Id: I17f2c50779426dc31a8e85d6903141c331882c86 Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>
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| a4e31cf0 | 01-Apr-2025 |
Boerge Struempfel <boerge.struempfel@gmail.com> |
feat(fdts): add support for STM32MP257D-based ultra-fly-sbc board
This commit adds support for the ultra-fly-sbc board, a rapid proto- typing reference board developed by Ultratronik GmbH. It featur
feat(fdts): add support for STM32MP257D-based ultra-fly-sbc board
This commit adds support for the ultra-fly-sbc board, a rapid proto- typing reference board developed by Ultratronik GmbH. It features an STM32MP257D SoC with 4 GiB LPDDR4, 8 GiB eMMC, and a microSD slot.
The board includes various UART, USB, SPI, and I2C ports/headers, along with a multipurpose E-Key M.2 connector and two Microbus headers. Additionally, the board supports LVDS, parallel, and MIPI-DSI video output.
These DTS(i) files are based on the STM32MP257F-DK board.
TF-A has been fully tested on this board with the latest OP-TEE developer setup.
Change-Id: I8fdc7fe570d9c5d37eb59e76808c3b1e5b708bc2 Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>
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| 811b8b47 | 01-Apr-2025 |
Govindraj Raja <govindraj.raja@arm.com> |
Merge "feat(st-pmic): add defines for NVM shadow registers" into integration |