History log of /rk3399_ARM-atf/ (Results 17126 – 17150 of 18314)
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21a3973d13-Jan-2016 Soby Mathew <soby.mathew@arm.com>

Remove support for legacy VE memory map in FVP

This patch removes support for legacy Versatile Express memory map for the
GIC peripheral in the FVP platform. The user guide is also updated for the
s

Remove support for legacy VE memory map in FVP

This patch removes support for legacy Versatile Express memory map for the
GIC peripheral in the FVP platform. The user guide is also updated for the
same.

Change-Id: Ib8cfb819083aca359e5b46b5757cb56cb0ea6533

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32d4f82627-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #597 from hzhuang1/emmc_v3.2

Emmc v3

2da3604218-Mar-2016 Haojian Zhuang <haojian.zhuang@linaro.org>

drivers: add emmc stack

In a lot of embedded platforms, eMMC device is the only one storage
device. So loading content from eMMC device is required in ATF.

Create the emmc stack that could co-work

drivers: add emmc stack

In a lot of embedded platforms, eMMC device is the only one storage
device. So loading content from eMMC device is required in ATF.

Create the emmc stack that could co-work with IO block driver.
Support to read/write/erase eMMC blocks on both rpmb and normal
user area. Support to change the IO speed and bus width.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

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08b375b021-Apr-2016 Haojian Zhuang <haojian.zhuang@linaro.org>

Document: add MAX_IO_BLOCK_DEVICES platform macro

Add MAX_IO_BLOCK_DEVICES in porting guide. It's necessary to define
this macro to support io block device. With this macro, multiple
block devices c

Document: add MAX_IO_BLOCK_DEVICES platform macro

Add MAX_IO_BLOCK_DEVICES in porting guide. It's necessary to define
this macro to support io block device. With this macro, multiple
block devices could be opened at the same time. Each block device
stores its own state.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

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9da7a65318-Mar-2016 Haojian Zhuang <haojian.zhuang@linaro.org>

IO: support block device type

FIP is accessed as memory-mapped type. eMMC is block device type.
In order to support FIP based on eMMC, add the new io_block layer.

io_block always access eMMC device

IO: support block device type

FIP is accessed as memory-mapped type. eMMC is block device type.
In order to support FIP based on eMMC, add the new io_block layer.

io_block always access eMMC device as block size. And it'll only
copy the required data into buffer in io_block driver. So preparing
an temporary buffer is required.

When use io_block device, MAX_IO_BLOCK_DEVICES should be declared
in platform_def.h. It's used to support multiple block devices.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

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4e41896327-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #612 from sandrine-bailleux-arm/sb/fix-xlat-lib-path

Doc: Fix the path to the xlat lib

846f296227-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #610 from bjackman/bj/fip-create-exit-code

fip_create: Fix exit status for missing output filename (2)

3992c35927-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #611 from sandrine-bailleux-arm/sb/fix-init_xlation_table_inner

Fix computation of L1 bitmask in the translation table lib

3c2c72fa26-Apr-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Doc: Fix the path to the xlat lib

The translation table library code has moved from lib/aarch64/ to
lib/xlat_tables/ since commit 3ca9928df but the Porting Guide still
points to the old location. Th

Doc: Fix the path to the xlat lib

The translation table library code has moved from lib/aarch64/ to
lib/xlat_tables/ since commit 3ca9928df but the Porting Guide still
points to the old location. This patch fixes this issue.

Change-Id: I983a9a100d70eacf6bac71725ffbb4bb5f3732b0

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6d9b7c1e25-Apr-2016 Brendan Jackman <brendan.jackman@arm.com>

fip_create: Fix exit status for missing output filename

Change-Id: I0d298eea9eaf47121c87637c7395e5d9868aa272

aa447b9c22-Apr-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Fix computation of L1 bitmask in the translation table lib

This patch fixes the computation of the bitmask used to isolate
the level 1 field of a virtual address. The whole computation needs
to work

Fix computation of L1 bitmask in the translation table lib

This patch fixes the computation of the bitmask used to isolate
the level 1 field of a virtual address. The whole computation needs
to work on 64-bit values to produce the correct bitmask value.
XLAT_TABLE_ENTRIES_MASK being a C constant, it is a 32-bit value
so it needs to be extended to a 64-bit value before it takes part
in any other computation.

This patch fixes this bug by casting XLAT_TABLE_ENTRIES_MASK as
an unsigned long long.

Note that this bug doesn't manifest itself in practice because
address spaces larger than 39 bits are not yet supported in the
Trusted Firmware.

Change-Id: I955fd263ecb691ca94b29b9c9f576008ce1d87ee

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142ff9b526-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #605 from yatharth-arm/yk/sys_counter_fix

Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms

1969625a26-Apr-2016 Yatharth Kochar <yatharth.kochar@arm.com>

Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms

This patch puts the definition of `plat_get_syscnt_freq()`
under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file.
This is t

Conditionally compile `plat_get_syscnt_freq()` in ARM standard platforms

This patch puts the definition of `plat_get_syscnt_freq()`
under `#ifdef ARM_SYS_CNTCTL_BASE` in arm_common.c file.
This is the fix for compilation error introduced by commit-id
`749ade4`, for platforms that use arm_common.c but do not
provide a memory mapped interface to the generic counter.

Fixes ARM-software/tf-issues#395

Change-Id: I2f2b10bd9500fa15308541ccb15829306a76a745

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b96f77c615-Jun-2015 Michal Simek <michal.simek@xilinx.com>

zynqmp: FSBL->ATF handover

Parse the parameter structure the FSBL populates, to populate the bl32
and bl33 image structures.

Cc: Sarat Chand Savitala <saratcha@xilinx.com>
Cc: petalinux-dev@xilinx.

zynqmp: FSBL->ATF handover

Parse the parameter structure the FSBL populates, to populate the bl32
and bl33 image structures.

Cc: Sarat Chand Savitala <saratcha@xilinx.com>
Cc: petalinux-dev@xilinx.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[ SB
- pass pointers to structs instead of structs
- handle execution state parameter
- populate bl32 SPSR
- add documentation
- query bootmode and consider missing handoff parameters an error when
not in JTAG boot mode
]
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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2cb5bac918-Apr-2016 Soren Brinkmann <soren.brinkmann@xilinx.com>

zynqmp: Introduce zynqmp_get_bootmode

Provide a function to retrieve the bootmode.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

e543e79b18-Apr-2016 Soren Brinkmann <soren.brinkmann@xilinx.com>

zynqmp: Remove bogus comment

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

0155533214-Apr-2016 Soren Brinkmann <soren.brinkmann@xilinx.com>

zynqmp: Revise memory configuration options

Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration

zynqmp: Revise memory configuration options

Drop the current configuration options for selecting the location of
the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION).
The new configuration provides one default setup (ATF in OCM,
BL32 in DRAM). Additionally, the new configuration options
- ZYNQMP_ATF_MEM_BASE
- ZYNQMP_ATF_MEM_SIZE
- ZYNQMP_BL32_MEM_BASE
- ZYNQMP_BL32_MEM_SIZE
can be used to freely configure the memory locations used for ATF and
secure payload.

Also, allow setting the BL33 entry point via PRELOADED_BL33_BASE.

Cc: petalinux-dev@xilinx.com
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Alistair Francis <alistair.francis@xilinx.com>

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cf4ee17725-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #604 from sandrine-bailleux-arm/sb/validate-psci_cpu_on_start-args

Validate psci_cpu_on_start() arguments

3f84cec525-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #602 from rockchip-linux/fixes-for-coreboot_v1

rockchip: fixes for the required

749ade4525-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #603 from yatharth-arm/yk/sys_counter

Move `plat_get_syscnt_freq()` to arm_common.c

22b09c1725-Apr-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Remove unused argument in psci_cpu_on_start()

The "end power level" value passed as the 3rd argument to the
psci_cpu_on_start() function is not used so this patch removes it.

Change-Id: Icaa68b8c4e

Remove unused argument in psci_cpu_on_start()

The "end power level" value passed as the 3rd argument to the
psci_cpu_on_start() function is not used so this patch removes it.

Change-Id: Icaa68b8c4ecd94507287970455fbff354faaa41e

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1ad9f93e22-Apr-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Validate psci_cpu_on_start() arguments

This patch introduces some debug assertions in the function
psci_cpu_on_start() to check the arguments it receives are
valid.

Change-Id: If4d23c9f668fb46f2d18

Validate psci_cpu_on_start() arguments

This patch introduces some debug assertions in the function
psci_cpu_on_start() to check the arguments it receives are
valid.

Change-Id: If4d23c9f668fb46f2d18c5e2ed1929498cc6736b

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0c05748b19-Apr-2016 Caesar Wang <wxt@rock-chips.com>

rockchip: fixes for the required

This patch has the following change for rk3399.

* Set the uart to 115200 since the loader decide to set
uart baud to 115200Hz. So the ATF also should set uart bau

rockchip: fixes for the required

This patch has the following change for rk3399.

* Set the uart to 115200 since the loader decide to set
uart baud to 115200Hz. So the ATF also should set uart baud to 115200.

* We need ensure the bl31 base is greater than 4KB since there are have
the shared mem for coreboot.(Note: the previous vesion was tested with uboot)

Otherwise, we will happen the exception crash since the ddr area won't
to work from the shared ram address in some cases.

For example, the exception crash:
CBFS: Found @ offset 19c80 size 24074
exception _sync_sp_el0
ELR = 0x0000000000008000
ESR = 0x0000000002000000
SPSR = 0x600003cc
FAR = 0xffffffff00000000
SP = 0x00000000ff8ed230
...
X29 = 0x00000000ff8c1fc0
X30 = 0x000000000030e3b0
exception death

Change-Id: I8bc557c6bcaf6804d2a313b38667d3e2517881d7
Signed-off-by: Caesar Wang <wxt@rock-chips.com>

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7607204c22-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #601 from sandrine-bailleux-arm/sb/a57-errata-workarounds

Cortex-A57 errata workarounds

7ee532a122-Apr-2016 danh-arm <dan.handley@arm.com>

Merge pull request #598 from antonio-nino-diaz-arm/an/xlat-overlap

Limit support for region overlaps in xlat_tables

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