1 /* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch.h> 32 #include <arch_helpers.h> 33 #include <assert.h> 34 #include <auth_mod.h> 35 #include <bl1.h> 36 #include <bl_common.h> 37 #include <debug.h> 38 #include <platform.h> 39 #include <platform_def.h> 40 #include <smcc_helpers.h> 41 #include <utils.h> 42 #include "bl1_private.h" 43 #include <uuid.h> 44 45 /* BL1 Service UUID */ 46 DEFINE_SVC_UUID(bl1_svc_uid, 47 0xfd3967d4, 0x72cb, 0x4d9a, 0xb5, 0x75, 48 0x67, 0x15, 0xd6, 0xf4, 0xbb, 0x4a); 49 50 51 static void bl1_load_bl2(void); 52 53 /******************************************************************************* 54 * The next function has a weak definition. Platform specific code can override 55 * it if it wishes to. 56 ******************************************************************************/ 57 #pragma weak bl1_init_bl2_mem_layout 58 59 /******************************************************************************* 60 * Function that takes a memory layout into which BL2 has been loaded and 61 * populates a new memory layout for BL2 that ensures that BL1's data sections 62 * resident in secure RAM are not visible to BL2. 63 ******************************************************************************/ 64 void bl1_init_bl2_mem_layout(const meminfo_t *bl1_mem_layout, 65 meminfo_t *bl2_mem_layout) 66 { 67 68 assert(bl1_mem_layout != NULL); 69 assert(bl2_mem_layout != NULL); 70 71 #if LOAD_IMAGE_V2 72 /* 73 * Remove BL1 RW data from the scope of memory visible to BL2. 74 * This is assuming BL1 RW data is at the top of bl1_mem_layout. 75 */ 76 assert(BL1_RW_BASE > bl1_mem_layout->total_base); 77 bl2_mem_layout->total_base = bl1_mem_layout->total_base; 78 bl2_mem_layout->total_size = BL1_RW_BASE - bl1_mem_layout->total_base; 79 #else 80 /* Check that BL1's memory is lying outside of the free memory */ 81 assert((BL1_RAM_LIMIT <= bl1_mem_layout->free_base) || 82 (BL1_RAM_BASE >= bl1_mem_layout->free_base + 83 bl1_mem_layout->free_size)); 84 85 /* Remove BL1 RW data from the scope of memory visible to BL2 */ 86 *bl2_mem_layout = *bl1_mem_layout; 87 reserve_mem(&bl2_mem_layout->total_base, 88 &bl2_mem_layout->total_size, 89 BL1_RAM_BASE, 90 BL1_RAM_LIMIT - BL1_RAM_BASE); 91 #endif /* LOAD_IMAGE_V2 */ 92 93 flush_dcache_range((unsigned long)bl2_mem_layout, sizeof(meminfo_t)); 94 } 95 96 /******************************************************************************* 97 * Function to perform late architectural and platform specific initialization. 98 * It also queries the platform to load and run next BL image. Only called 99 * by the primary cpu after a cold boot. 100 ******************************************************************************/ 101 void bl1_main(void) 102 { 103 unsigned int image_id; 104 105 /* Announce our arrival */ 106 NOTICE(FIRMWARE_WELCOME_STR); 107 NOTICE("BL1: %s\n", version_string); 108 NOTICE("BL1: %s\n", build_message); 109 110 INFO("BL1: RAM 0x%lx - 0x%lx\n", BL1_RAM_BASE, BL1_RAM_LIMIT); 111 112 113 #if DEBUG 114 unsigned long val; 115 /* 116 * Ensure that MMU/Caches and coherency are turned on 117 */ 118 val = read_sctlr_el3(); 119 assert(val & SCTLR_M_BIT); 120 assert(val & SCTLR_C_BIT); 121 assert(val & SCTLR_I_BIT); 122 /* 123 * Check that Cache Writeback Granule (CWG) in CTR_EL0 matches the 124 * provided platform value 125 */ 126 val = (read_ctr_el0() >> CTR_CWG_SHIFT) & CTR_CWG_MASK; 127 /* 128 * If CWG is zero, then no CWG information is available but we can 129 * at least check the platform value is less than the architectural 130 * maximum. 131 */ 132 if (val != 0) 133 assert(CACHE_WRITEBACK_GRANULE == SIZE_FROM_LOG2_WORDS(val)); 134 else 135 assert(CACHE_WRITEBACK_GRANULE <= MAX_CACHE_LINE_SIZE); 136 #endif 137 138 /* Perform remaining generic architectural setup from EL3 */ 139 bl1_arch_setup(); 140 141 #if TRUSTED_BOARD_BOOT 142 /* Initialize authentication module */ 143 auth_mod_init(); 144 #endif /* TRUSTED_BOARD_BOOT */ 145 146 /* Perform platform setup in BL1. */ 147 bl1_platform_setup(); 148 149 /* Get the image id of next image to load and run. */ 150 image_id = bl1_plat_get_next_image_id(); 151 152 /* 153 * We currently interpret any image id other than 154 * BL2_IMAGE_ID as the start of firmware update. 155 */ 156 if (image_id == BL2_IMAGE_ID) 157 bl1_load_bl2(); 158 else 159 NOTICE("BL1-FWU: *******FWU Process Started*******\n"); 160 161 bl1_prepare_next_image(image_id); 162 } 163 164 /******************************************************************************* 165 * This function locates and loads the BL2 raw binary image in the trusted SRAM. 166 * Called by the primary cpu after a cold boot. 167 * TODO: Add support for alternative image load mechanism e.g using virtio/elf 168 * loader etc. 169 ******************************************************************************/ 170 void bl1_load_bl2(void) 171 { 172 image_desc_t *image_desc; 173 image_info_t *image_info; 174 entry_point_info_t *ep_info; 175 meminfo_t *bl1_tzram_layout; 176 meminfo_t *bl2_tzram_layout; 177 int err; 178 179 /* Get the image descriptor */ 180 image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID); 181 assert(image_desc); 182 183 /* Get the image info */ 184 image_info = &image_desc->image_info; 185 186 /* Get the entry point info */ 187 ep_info = &image_desc->ep_info; 188 189 /* Find out how much free trusted ram remains after BL1 load */ 190 bl1_tzram_layout = bl1_plat_sec_mem_layout(); 191 192 INFO("BL1: Loading BL2\n"); 193 194 #if LOAD_IMAGE_V2 195 err = load_auth_image(BL2_IMAGE_ID, image_info); 196 #else 197 /* Load the BL2 image */ 198 err = load_auth_image(bl1_tzram_layout, 199 BL2_IMAGE_ID, 200 image_info->image_base, 201 image_info, 202 ep_info); 203 204 #endif /* LOAD_IMAGE_V2 */ 205 206 if (err) { 207 ERROR("Failed to load BL2 firmware.\n"); 208 plat_error_handler(err); 209 } 210 211 /* 212 * Create a new layout of memory for BL2 as seen by BL1 i.e. 213 * tell it the amount of total and free memory available. 214 * This layout is created at the first free address visible 215 * to BL2. BL2 will read the memory layout before using its 216 * memory for other purposes. 217 */ 218 #if LOAD_IMAGE_V2 219 bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->total_base; 220 #else 221 bl2_tzram_layout = (meminfo_t *) bl1_tzram_layout->free_base; 222 #endif /* LOAD_IMAGE_V2 */ 223 224 bl1_init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout); 225 226 ep_info->args.arg1 = (unsigned long)bl2_tzram_layout; 227 NOTICE("BL1: Booting BL2\n"); 228 VERBOSE("BL1: BL2 memory layout address = 0x%llx\n", 229 (unsigned long long) bl2_tzram_layout); 230 } 231 232 /******************************************************************************* 233 * Function called just before handing over to BL31 to inform the user about 234 * the boot progress. In debug mode, also print details about the BL31 image's 235 * execution context. 236 ******************************************************************************/ 237 void bl1_print_bl31_ep_info(const entry_point_info_t *bl31_ep_info) 238 { 239 NOTICE("BL1: Booting BL31\n"); 240 print_entry_point_info(bl31_ep_info); 241 } 242 243 #if SPIN_ON_BL1_EXIT 244 void print_debug_loop_message(void) 245 { 246 NOTICE("BL1: Debug loop, spinning forever\n"); 247 NOTICE("BL1: Please connect the debugger to continue\n"); 248 } 249 #endif 250 251 /******************************************************************************* 252 * Top level handler for servicing BL1 SMCs. 253 ******************************************************************************/ 254 register_t bl1_smc_handler(unsigned int smc_fid, 255 register_t x1, 256 register_t x2, 257 register_t x3, 258 register_t x4, 259 void *cookie, 260 void *handle, 261 unsigned int flags) 262 { 263 264 #if TRUSTED_BOARD_BOOT 265 /* 266 * Dispatch FWU calls to FWU SMC handler and return its return 267 * value 268 */ 269 if (is_fwu_fid(smc_fid)) { 270 return bl1_fwu_smc_handler(smc_fid, x1, x2, x3, x4, cookie, 271 handle, flags); 272 } 273 #endif 274 275 switch (smc_fid) { 276 case BL1_SMC_CALL_COUNT: 277 SMC_RET1(handle, BL1_NUM_SMC_CALLS); 278 279 case BL1_SMC_UID: 280 SMC_UUID_RET(handle, bl1_svc_uid); 281 282 case BL1_SMC_VERSION: 283 SMC_RET1(handle, BL1_SMC_MAJOR_VER | BL1_SMC_MINOR_VER); 284 285 default: 286 break; 287 } 288 289 WARN("Unimplemented BL1 SMC Call: 0x%x \n", smc_fid); 290 SMC_RET1(handle, SMC_UNK); 291 } 292