History log of /rk3399_ARM-atf/ (Results 16976 – 17000 of 18314)
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3e3616ab05-May-2016 Soby Mathew <soby.mathew@arm.com>

AArch32: Add SMCC context

This patch defines a SMCC context to save and restore
registers during a SMC call. It also adds appropriate helpers
to save and restore from this context for use by AArch32

AArch32: Add SMCC context

This patch defines a SMCC context to save and restore
registers during a SMC call. It also adds appropriate helpers
to save and restore from this context for use by AArch32
secure payload and BL stages.

Change-Id: I64c8d6fe1d6cac22e1f1f39ea1b54ee1b1b72248

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1ae0a49a05-May-2016 Soby Mathew <soby.mathew@arm.com>

AArch32: Add API to invoke runtime service handler

This patch adds an API in runtime service framework to
invoke the registered handler corresponding to the SMC function
identifier. This is helpful

AArch32: Add API to invoke runtime service handler

This patch adds an API in runtime service framework to
invoke the registered handler corresponding to the SMC function
identifier. This is helpful for AArch32 because the number of
arguments required by the handler is more than registers
available as per AArch32 program calling conventions and
requires the use of stack. Hence this new API will do the
necessary argument setup and invoke the appropriate
handler. Although this API is primarily intended for AArch32,
it can be used for AArch64 as well.

Change-Id: Iefa15947fe5a1df55b0859886e677446a0fd7241

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bc202b4405-May-2016 Soby Mathew <soby.mathew@arm.com>

AArch32: Add tf_printf support

The tf_printf library uses 64 bit division to print numbers
in appropriate formats but AArch32 mode cannot do 64 bit division
natively. Hence this patch adds additiona

AArch32: Add tf_printf support

The tf_printf library uses 64 bit division to print numbers
in appropriate formats but AArch32 mode cannot do 64 bit division
natively. Hence this patch adds additional number printing routines
to handle AArch32 mode in tf_printf library. The decimal format
printing capability is limited to 32 bit integers whereas 64 bits
are supported in hexadecimal format. The library assumes that
secure world is running in Little-Endian mode to do bit
manipulations on 64 bit. Suitable assertions are present to
enforce this assumption.

Change-Id: I55a21e448cef4915d1834d76e48a84ccf0bec36d

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b2bca61d30-Jun-2016 Soby Mathew <soby.mathew@arm.com>

AArch32: Add translation table library support

This patch adds translation library supports for AArch32 platforms.
The library only supports long descriptor formats for AArch32.
The `enable_mmu_secu

AArch32: Add translation table library support

This patch adds translation library supports for AArch32 platforms.
The library only supports long descriptor formats for AArch32.
The `enable_mmu_secure()` enables the MMU for secure world with
`TTBR0` pointing to the populated translation tables.

Change-Id: I061345b1779391d098e35e7fe0c76e3ebf850e08

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f24307de05-May-2016 Soby Mathew <soby.mathew@arm.com>

AArch32: Add assembly helpers

This patch adds various assembly helpers for AArch32 like :

* cache management : Functions to flush, invalidate and clean
cache by MVA. Also helpers to do cache operat

AArch32: Add assembly helpers

This patch adds various assembly helpers for AArch32 like :

* cache management : Functions to flush, invalidate and clean
cache by MVA. Also helpers to do cache operations by set-way
are also added.

* stack management: Macros to declare stack and get the current
stack corresponding to current CPU.

* Misc: Macros to access co processor registers in AArch32,
macros to define functions in assembly, assert macros, generic
`do_panic()` implementation and function to zero block of memory.

Change-Id: I7b78ca3f922c0eda39beb9786b7150e9193425be

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031dbb1209-May-2016 Soby Mathew <soby.mathew@arm.com>

AArch32: Add essential Arch helpers

This patch adds the essential AArch32 architecture helpers
arch.h and arch_helpers.h and modifies `_types.h` to add AArch32
support.

A new build option `ARCH` is

AArch32: Add essential Arch helpers

This patch adds the essential AArch32 architecture helpers
arch.h and arch_helpers.h and modifies `_types.h` to add AArch32
support.

A new build option `ARCH` is defined in the top level makefile to
enable the component makefiles to choose the right files based on the
Architecture it is being build for. Depending on this flag, either
`AARCH32` or `AARCH64` flag is defined by the Makefile. The default
value of `ARCH` flag is `aarch64`. The AArch32 build support will be
added in a later patch.

Change-Id: I405e5fac02db828a55cd25989b572b64cb005241

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c45f627d20-Jul-2016 Soby Mathew <soby.mathew@arm.com>

Move SIZE_FROM_LOG2_WORDS macro to utils.h

This patch moves the macro SIZE_FROM_LOG2_WORDS() defined in
`arch.h` to `utils.h` as it is utility macro.

Change-Id: Ia8171a226978f053a1ee4037f80142c0a4d

Move SIZE_FROM_LOG2_WORDS macro to utils.h

This patch moves the macro SIZE_FROM_LOG2_WORDS() defined in
`arch.h` to `utils.h` as it is utility macro.

Change-Id: Ia8171a226978f053a1ee4037f80142c0a4d21430

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12ab697e08-Aug-2016 Soby Mathew <soby.mathew@arm.com>

Move spinlock library code to AArch64 folder

This patch moves the assembly exclusive lock library code
`spinlock.S` into architecture specific folder `aarch64`.
A stub file which includes the file f

Move spinlock library code to AArch64 folder

This patch moves the assembly exclusive lock library code
`spinlock.S` into architecture specific folder `aarch64`.
A stub file which includes the file from new location is
retained at the original location for compatibility. The BL
makefiles are also modified to include the file from the new
location.

Change-Id: Ide0b601b79c439e390c3a017d93220a66be73543

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b127109108-Aug-2016 Soby Mathew <soby.mathew@arm.com>

Migrate platform makefile to new console driver location

This patch migrates the upstream platform makefiles to include the
console drivers from the new location in ARM Trusted Firmware code
base.

Migrate platform makefile to new console driver location

This patch migrates the upstream platform makefiles to include the
console drivers from the new location in ARM Trusted Firmware code
base.

Change-Id: I866d6c4951e475de1f836ce8a8c1d5e6da9577e3

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9c94d3b308-Aug-2016 Soby Mathew <soby.mathew@arm.com>

Move console drivers to AArch64 folder

This patch moves the various assembly console drivers
into `aarch64` architecture specific folder. Stub files,
which include files from new location, are retai

Move console drivers to AArch64 folder

This patch moves the various assembly console drivers
into `aarch64` architecture specific folder. Stub files,
which include files from new location, are retained at the
original location for platform compatibility reasons.

Change-Id: I0069b6c1c0489ca47f5204d4e26e3bc3def533a8

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2000265513-Jul-2016 Soby Mathew <soby.mathew@arm.com>

Fix the translation table library for wraparound cases

This patch fixes the translation table library for wraparound cases. These
cases are not expected to occur on AArch64 platforms because only th

Fix the translation table library for wraparound cases

This patch fixes the translation table library for wraparound cases. These
cases are not expected to occur on AArch64 platforms because only the
48 bits of the 64 bit address space are used. But it is a possibility for
AArch32 platforms.

Change-Id: Ie7735f7ba2977019381e1c124800381471381499

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ee3e935909-Aug-2016 danh-arm <dan.handley@arm.com>

Merge pull request #676 from hzhuang1/fix_io_unaligned

io: block: fix unaligned buffer

41b568f509-Aug-2016 danh-arm <dan.handley@arm.com>

Merge pull request #661 from dp-arm/master

Replace fip_create with fiptool

9d063aa228-Jul-2016 Haojian Zhuang <haojian.zhuang@linaro.org>

io: block: fix unaligned buffer

If buffer address parameter isn't aligned, it may cause
DMA issue in block device driver, as eMMC. Now check the buffer
address. If it's not aligned, use temporary bu

io: block: fix unaligned buffer

If buffer address parameter isn't aligned, it may cause
DMA issue in block device driver, as eMMC. Now check the buffer
address. If it's not aligned, use temporary buffer in io block
driver instead.

Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>

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819281ee25-May-2016 dp-arm <dimitris.papastamos@arm.com>

Replace fip_create with fiptool

fiptool provides a more consistent and intuitive interface compared to
the fip_create program. It serves as a better base to build on more
features in the future.

f

Replace fip_create with fiptool

fiptool provides a more consistent and intuitive interface compared to
the fip_create program. It serves as a better base to build on more
features in the future.

fiptool supports various subcommands. Below are the currently
supported subcommands:

1) info - List the images contained in a FIP file.
2) create - Create a new FIP file with the given images.
3) update - Update an existing FIP with the given images.
4) unpack - Extract a selected set or all the images from a FIP file.
5) remove - Remove images from a FIP file. This is a new command that
was not present in fip_create.

To create a new FIP file, replace "fip_create" with "fiptool create".

To update a FIP file, replace "fip_create" with "fiptool update".

To dump the contents of a FIP file, replace "fip_create --dump" with
"fiptool info".

A compatibility script that emulates the basic functionality of
fip_create is provided. Existing scripts might or might not work with
the compatibility script. Users are strongly encouraged to migrate to
fiptool.

Fixes ARM-Software/tf-issues#87
Fixes ARM-Software/tf-issues#108
Fixes ARM-Software/tf-issues#361

Change-Id: I7ee4da7ac60179cc83cf46af890fd8bc61a53330

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3d99b17f28-Jul-2016 danh-arm <dan.handley@arm.com>

Merge pull request #668 from sandrine-bailleux-arm/sb/rodata-xn-doc

Documentation for SEPARATE_CODE_AND_RODATA build flag

29712f1a07-Jul-2016 Sandrine Bailleux <sandrine.bailleux@arm.com>

Documentation for SEPARATE_CODE_AND_RODATA build flag

This patch documents the effect, cost and benefits of the
SEPARATE_CODE_AND_RODATA build flag.

Change-Id: Ic8daf0563fa6335930ad6c70b9c35f678e84

Documentation for SEPARATE_CODE_AND_RODATA build flag

This patch documents the effect, cost and benefits of the
SEPARATE_CODE_AND_RODATA build flag.

Change-Id: Ic8daf0563fa6335930ad6c70b9c35f678e84d39d

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d75eff8028-Jul-2016 danh-arm <dan.handley@arm.com>

Merge pull request #674 from rockchip-linux/Support-PWMs-for-rk3399-suspend/resume

rockchip: fixes typo and some bugs for suspend/resume tests

578b3ad728-Jul-2016 danh-arm <dan.handley@arm.com>

Merge pull request #673 from soby-mathew/sm/coverity_issue

Improve debug assertion for runtime svc number

63ad1ef428-Jul-2016 danh-arm <dan.handley@arm.com>

Merge pull request #672 from soby-mathew/sm/irouter_offset

GICv3: Fix the GICD_IROUTER offset

405f42f928-Jul-2016 danh-arm <dan.handley@arm.com>

Merge pull request #671 from antonio-nino-diaz-arm/an/unoptimised-mem

ARM platforms: Define common image sizes

e6517abd21-Jul-2016 Caesar Wang <wxt@rock-chips.com>

rockchip: fixes typo and some bugs for suspend/resume tests

1. Remove the AP_PWROFF in ATF, should configure it in kernel.
2. Save and restore the PWMs pin/regs for suspend/resume.
3. The pmusgrf re

rockchip: fixes typo and some bugs for suspend/resume tests

1. Remove the AP_PWROFF in ATF, should configure it in kernel.
2. Save and restore the PWMs pin/regs for suspend/resume.
3. The pmusgrf reset-hold bits needs to be released. since the
pmusgrf reset-hold bits needs to be held.
4. Configure the PMU power up/down cycles about delay 3ms.
5. With the MMIO register block as one big mapping.
6. Fix the build error with psci_entrypoint since PSCI lib updated.

Fixes the commit
9ec78bd ("rockchip: support the suspend/resume for rk3399").

Change-Id: I112806700bf433c87763aac23d22fa7e6a7f5264

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61e3027726-Jul-2016 Soby Mathew <soby.mathew@arm.com>

GICv3: Fix the GICD_IROUTER offset

This patch fixes the offset of GICD_IROUTER register defined in gicv3.h.
Although the GICv3 documention mentions that the offset for this register
is 0x6100-0x7FD8

GICv3: Fix the GICD_IROUTER offset

This patch fixes the offset of GICD_IROUTER register defined in gicv3.h.
Although the GICv3 documention mentions that the offset for this register
is 0x6100-0x7FD8, the offset calculation for an interrupt id `n` is :

0x6000 + 8n, where n >= 32

This requires the offset for GICD_IROUTER to be defined as 0x6000.

Fixes ARM-software/tf-issues#410

Change-Id: If9e91e30d946afe7f1f60fea4f065c7567093fa8

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5e5e416226-Jul-2016 Soby Mathew <soby.mathew@arm.com>

Improve debug assertion for runtime svc number

This patch improves the debug assertion for runtime svc number
- Remove useless comparison ensuring that the number of descriptors
is a positive nu

Improve debug assertion for runtime svc number

This patch improves the debug assertion for runtime svc number
- Remove useless comparison ensuring that the number of descriptors
is a positive number. The variable is an unsigned integer so can't
be negative.
- Check that the end address of the descriptors is sane relative
to the start address.

Change-Id: Iea7be6b34e33b8b1cbd394eb923cc834ea964831

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422a40d926-Jul-2016 danh-arm <dan.handley@arm.com>

Merge pull request #670 from achingupta/ag/psci_retention_fix

Fix use of stale power states in PSCI standby finisher

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