zynqmp: Make MMIO write FW call synchronous

We must guarantee that writes have become effective before returning to
the caller. Hence, wait for PMUFW signaling completion of the FW call
before retur

zynqmp: Make MMIO write FW call synchronous

We must guarantee that writes have become effective before returning to
the caller. Hence, wait for PMUFW signaling completion of the FW call
before returning to the rich OS.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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zynqmp: Add support to provide silicon id through SMC

Add support to provide silicon id to non-secure
software through SMC.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

[ sb
Move

zynqmp: Add support to provide silicon id through SMC

Add support to provide silicon id to non-secure
software through SMC.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

[ sb
Move zynqmp_get_silicon_id outside of compile guards to avoid build
errors.
]

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>

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zynqmp: pm: Implemented pm API functions to load the bitstream into PL

This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide
the Access to the xilfpga library to load the bitstrea

zynqmp: pm: Implemented pm API functions to load the bitstream into PL

This patch adds pm_fpga_load() and pm_fpga_get_status() API's to provide
the Access to the xilfpga library to load the bitstream into zynqmp
PL region.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>

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zynqmp: pm: adds new pm ID to sync with PMUFW ID numbers

This patch adds a new pm ID to sync with PMUFW ID numbers.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>

zynqmp: Initialize GIC on suspend_finish

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

zynqmp: pm: Call set_wakeup_source for all wake devices on sys-suspend

During system suspend, identify slaves which are configured
as wake sources and call pm_set_wakeup_source API for each of them.

zynqmp: pm: Call set_wakeup_source for all wake devices on sys-suspend

During system suspend, identify slaves which are configured
as wake sources and call pm_set_wakeup_source API for each of them.

Identifying if device may wake the system is done by checking if any
interrupt of that device is enabled in GICD_ISENABLER when the APU is
about to enter SUSPEND_TO_RAM state. If such interrupt is found,
pm_set_wakeup_source is called with corresponding PM node ID as
argument.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

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zynqmp: pm: Add PM node IDs for GPU, PCIE, PCAP and RTC

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>

zynqmp: pm: Provide state argument to the pm_self_suspend API call

The state argument of the pm_self_suspend API encodes the state to
which the APU intends to suspend. The state can be:
- PM_APU_STA

zynqmp: pm: Provide state argument to the pm_self_suspend API call

The state argument of the pm_self_suspend API encodes the state to
which the APU intends to suspend. The state can be:
- PM_APU_STATE_CPU_IDLE - processor power down, all memories remain
on
- PM_APU_STATE_SUSPEND_TO_RAM - all processors powered down, L2$
powered down, all OCM banks in retention and DDR in
self-refresh.
The calls for setting requirements for L2$ and OCM banks are now
redundant and removed.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
[ sb
- remove redundant #defines
]
Signed-off-by: Sören Brinkmann <soren.brinkmann@xilinx.com>

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zynqmp: Add simple implementation of zynqmp_validate_power_state()

Implementation is based on arm_validate_power_state().
This function is called during CPU_SUSPEND PSCI call to validate
power_state

zynqmp: Add simple implementation of zynqmp_validate_power_state()

Implementation is based on arm_validate_power_state().
This function is called during CPU_SUSPEND PSCI call to validate
power_state parameter. If state is valid this function populate it
in req_state array as power domain level specific local state.
ATF platform migration guide chapter 2.2 defines this function as
mandatory for PSCIv1.0 CPU_SUSPEND support.

Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>

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zynqmp: Increase MAX_XLAT_TABLES

When moving the ATF into the DRAM address space an additional
translation table is required.

Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sore

zynqmp: Increase MAX_XLAT_TABLES

When moving the ATF into the DRAM address space an additional
translation table is required.

Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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zynqmp: Change default BL31 address space

The OCM space was reorganized to use the space more efficiently. Adjust
the default ATF location to be aligned with other ZynqMP software
components.

Signe

zynqmp: Change default BL31 address space

The OCM space was reorganized to use the space more efficiently. Adjust
the default ATF location to be aligned with other ZynqMP software
components.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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zynqmp: Add RW access to L2ACTLR_EL1 and CPUACTLR_EL1

Arm provided error injection support. To enable this error injection,
we need to set L2DEIEN in L2ACTLR_EL1 register and L1DEIEN in
CPUACTLR_EL1

zynqmp: Add RW access to L2ACTLR_EL1 and CPUACTLR_EL1

Arm provided error injection support. To enable this error injection,
we need to set L2DEIEN in L2ACTLR_EL1 register and L1DEIEN in
CPUACTLR_EL1 register.

This is needed for our cortexa53 edac linux driver testing.
These registers need write access from non secure EL1 i.e linux
at the time of setting the above bits.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>

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zynqmp: Set RESET_TO_BL31 through platform.mk

ZynqMP only supports builds with RESET_TO_BL31=1. Set this option
through the platform makefile on default.

Signed-off-by: Soren Brinkmann <soren.brink

zynqmp: Set RESET_TO_BL31 through platform.mk

ZynqMP only supports builds with RESET_TO_BL31=1. Set this option
through the platform makefile on default.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

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zynqmp: pm: Added NODE_IPI_RPU_0 node definition in pm_defs

Nodes represent IPI dedicated to the RPU (not accessible by APU)

Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>

zynqmp: Add support for generic_delay_timer

Initialize the generic_delay_timer in the zynqmp port.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>

Merge pull request #703 from rockchip-linux/fixes-gic-panic

rockchip: fixes the gic panic for rk3399 resume

rockchip: fixes the gic panic for rk3399 resume

We make sure the resuming of gic need to be enabled.
Otherwise, The resume will hit the below panic.
...
[ 24.230541] CPU0: update max cpu_capacity

rockchip: fixes the gic panic for rk3399 resume

We make sure the resuming of gic need to be enabled.
Otherwise, The resume will hit the below panic.
...
[ 24.230541] CPU0: update max cpu_capacity 451
[ 24.236029] CPU5: update max cpu_capacity 1024
[ 24.236046] CPU4: shutdown
[ 24.243205] psci: CPU4 killed.
[ 24.258730] CPU5: shutdown
[ 24.261472] psci: CPU5 killed.
[ 24.270417] GIC: unable to set SRE (disabled at EL2), panic ahead
[ 24.270417] cat[7801]: undefined instruction: pc=ffffffc0004e65d0
[ 24.270417] Code: b0003940 91274400 97f871af d2801e00 (d5184600)
[ 24.270417] Internal error: Oops - undefined instruction: 0 [#1] PREEMPT

Change-Id: Ie9542c8d5768ba0accfa073453da8bfe06d4f921

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Merge pull request #698 from rockchip-linux/set-APIO-for-rk3399

Set apio for rk3399

GICv3: Allow either G1S or G0 interrupts to be configured

Currently the GICv3 driver mandates that platform populate
both G1S and G0 interrupts. However, it is possible that a
given platform is not

GICv3: Allow either G1S or G0 interrupts to be configured

Currently the GICv3 driver mandates that platform populate
both G1S and G0 interrupts. However, it is possible that a
given platform is not interested in both the groups and
just needs to specify either one of them.

This patch modifies the `gicv3_rdistif_init()` & `gicv3_distif_init()`
functions to allow either G1S or G0 interrupts to be configured.

Fixes ARM-software/tf-issues#400

Change-Id: I43572b0e08ae30bed5af9334f25d35bf439b0d2b

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fiptool: Add support for printing the sha256 digest with info command

This feature allows one to quickly verify that the expected
image is contained in the FIP without extracting the image and
runni

fiptool: Add support for printing the sha256 digest with info command

This feature allows one to quickly verify that the expected
image is contained in the FIP without extracting the image and
running sha256sum(1) on it.

The sha256 digest is only shown when the verbose flag is used.

This change requires libssl-dev to be installed in order to build
Trusted Firmware. Previously, libssl-dev was optionally needed only
to support Trusted Board Boot configurations.

Fixes ARM-Software/tf-issues#124

Change-Id: Ifb1408d17f483d482bb270a589ee74add25ec5a6

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Support for Mediatek MT6795 SoC

This patch support single core to boot to Linux kernel
through Trusted Firmware.
It also support 32 bit kernel and 64 bit kernel booting.

Merge pull request #699 from soby-mathew/sm/flush_plat_psci_ops

Flush `psci_plat_pm_ops` after initialization

rockchip: fixes some typo

As the checkpatch reports the warning or error.

plat/rockchip/common/plat_pm.c:96:
ERROR: do not set execute permissions for source files
plat/rockchip/rk3399/drivers/pmu/

rockchip: fixes some typo

As the checkpatch reports the warning or error.

plat/rockchip/common/plat_pm.c:96:
ERROR: do not set execute permissions for source files
plat/rockchip/rk3399/drivers/pmu/pmu.c:294:
ERROR: do not set execute permissions for source files

plat/rockchip/common/plat_pm.c:286: WARNING: line over 80 characters
plat/rockchip/common/plat_pm.c:287: WARNING: line over 80 characters

Change-Id: Ib347da21c56551c31df3f90f03777b13c75d5c26

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rockchip: SIP call use 32 bit return value for rk3399

for compatible 32bit and 64bit, we use 0x82xxxxxx as function ID,
we modify SIP call function return value to 32 bit.

Change-Id: Ib99b03a9ea423

rockchip: SIP call use 32 bit return value for rk3399

for compatible 32bit and 64bit, we use 0x82xxxxxx as function ID,
we modify SIP call function return value to 32 bit.

Change-Id: Ib99b03a9ea423853aaa296dcc634ee82c622a552

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rockchip: set gpio2 ~ gpio4 to input and pull none mode

For save power cosumption, if gpio power supply shut down, we need to
set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery
the

rockchip: set gpio2 ~ gpio4 to input and pull none mode

For save power cosumption, if gpio power supply shut down, we need to
set gpio2 ~ gpio4 to input and HiZ status when suspend, and recovery
they status when rusume. we do it base on apio pass from loader.

Change-Id: I59fd2395e5e37e63425472a39f519822c9197e4c

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