| b91926fd | 09-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #968 from antonio-nino-diaz-arm/an/snprintf-alt
mbedtls: Don't use tf_snprintf if option not defined |
| c906d2a8 | 08-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #967 from rockchip-linux/rockchip-cleanup-20170606
RK3399: Shrink M0 SRAM code to fit in PMUSRAM |
| d20f189d | 07-Jun-2017 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
tegra: Fix build errors
The 'impl' variable is guarded by the symbol DEBUG, but used in an INFO level print statement. INFO is defined based on LOG_LEVEL. Hence, builds would fail when - DEBUG=0 &&
tegra: Fix build errors
The 'impl' variable is guarded by the symbol DEBUG, but used in an INFO level print statement. INFO is defined based on LOG_LEVEL. Hence, builds would fail when - DEBUG=0 && LOG_LEVEL>=LOG_LEVEL_INFO with a variable used but not defined - DEBUG=1 && LOG_LEVEL<LOG_LEVEL_INFO with a variable defined but not used
Fixing this by guarding impl with the same condition that guards INFO.
Fixes ARM-software/tf-issues#490 Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 1cda23b5 | 06-Jun-2017 |
Dan Handley <dan.handley@arm.com> |
Docs: Clarify copyright requirements
Clarify copyright requirements in contributing.md.
Also clarify maintainership structure by adding a new maintainers.md. This imports individual maintainer deta
Docs: Clarify copyright requirements
Clarify copyright requirements in contributing.md.
Also clarify maintainership structure by adding a new maintainers.md. This imports individual maintainer details from the GitHub wiki.
Fixes ARM-software/tf-issues#488
Change-Id: I7135d3f77ea45533f667de7e1dcdf65697486a91 Signed-off-by: Dan Handley <dan.handley@arm.com>
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| 0437c421 | 08-Jun-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #970 from vingu-linaro/enable-pmf-rt-instr-hikey
Enable pmf rt instr hikey |
| 5747ecab | 08-Jun-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #959 from hzhuang1/hikey960_v1
Hikey960 v1 |
| 84597b57 | 12-May-2017 |
Lin Huang <hl@rock-chips.com> |
rockchip: check wakeup cpu when resume
unlike rk3399 and rk3368, there are some rockchip 64bit SOC do not have CPUPD, and pmu_cpuson_entrypoint() is common function for rockchip platform, so we need
rockchip: check wakeup cpu when resume
unlike rk3399 and rk3368, there are some rockchip 64bit SOC do not have CPUPD, and pmu_cpuson_entrypoint() is common function for rockchip platform, so we need to check wakeup cpu when resume.
Change-Id: I6313e8a9d7c16b03e033414f0cb281646c2159ff Signed-off-by: Lin Huang <hl@rock-chips.com>
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| 4e836d35 | 16-May-2017 |
Lin Huang <hl@rock-chips.com> |
rockchip/rk3399: enable PMU_PERILP_PD_EN bit when suspend
with PMU_PERILP_PD_EN bit enable, the soc will shutdown cm0, crypto, dcf, imem(normal SRAM), dmac, bootrom, efuse_con, spi, i2c, uart, sarad
rockchip/rk3399: enable PMU_PERILP_PD_EN bit when suspend
with PMU_PERILP_PD_EN bit enable, the soc will shutdown cm0, crypto, dcf, imem(normal SRAM), dmac, bootrom, efuse_con, spi, i2c, uart, saradc, tsadc when suspend, we have M0 code need to run when suspend in normal SRAM, so we need to take care of that.
Change-Id: I8c066637e5b81d4b1d53197450b9d592cbe00793 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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| af27fb89 | 16-May-2017 |
Derek Basehore <dbasehore@chromium.org> |
rockchip/rk3399: Move DRAM restore to PMUSRAM
This moves the DRAM restore code to PMUSRAM. This is so that the voltage domain that contains the SRAM that it was stored in before may be turned off du
rockchip/rk3399: Move DRAM restore to PMUSRAM
This moves the DRAM restore code to PMUSRAM. This is so that the voltage domain that contains the SRAM that it was stored in before may be turned off during system suspend.
Change-Id: Id761181a30caadd12f1ce061d1034f3159a76d28 Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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| c82eef6c | 13-May-2017 |
Derek Basehore <dbasehore@chromium.org> |
rockchip/rk3399: convert to for-loops to save code space
This converts two functions to use for-loops. This saves a bit of space to help moving DRAM resume code to PMUSRAM.
Change-Id: Ie6ca490cf50c
rockchip/rk3399: convert to for-loops to save code space
This converts two functions to use for-loops. This saves a bit of space to help moving DRAM resume code to PMUSRAM.
Change-Id: Ie6ca490cf50c2ec83335cf1845b337c3e8a47496 Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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| 87aad734 | 11-May-2017 |
Derek Basehore <dbasehore@chromium.org> |
rockchip/rk3399: Remove unneeded if statement
The removed if statement would make the same check that the for loop it is in does to break out of the for loop, so it doesn't make any sense to keep it
rockchip/rk3399: Remove unneeded if statement
The removed if statement would make the same check that the for loop it is in does to break out of the for loop, so it doesn't make any sense to keep it there.
Change-Id: I819c29f9182e6de1fc47e418aed15ad38e8f9fa9 Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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| 18f705fa | 11-May-2017 |
Derek Basehore <dbasehore@chromium.org> |
rockchip/rk3399: Remove unneeded register sets
This removes the mmio_... function calls to set the multicast bit for the PHY registers when overriding the write leveling values. These are not needed
rockchip/rk3399: Remove unneeded register sets
This removes the mmio_... function calls to set the multicast bit for the PHY registers when overriding the write leveling values. These are not needed since multicast is set by default when calling the function, and it's also better not to leave the side effect of disabling multicast when exiting the function.
Change-Id: I83e089a2a2d55268b3832f36724c3b2c4be81082 Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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| 7d1b3f5a | 07-May-2017 |
Derek Basehore <dbasehore@chromium.org> |
rockchip/rk3399: remove unneeded DDR restore function
This removes the phy_dll_bypass_set function as it is unneeded. The values that function sets are saved during suspend, so the proper values wil
rockchip/rk3399: remove unneeded DDR restore function
This removes the phy_dll_bypass_set function as it is unneeded. The values that function sets are saved during suspend, so the proper values will be restored on resume.
Change-Id: I17542206c56e639ce8cb6375233145167441d4e2 Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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| 60400fc8 | 06-May-2017 |
Derek Basehore <dbasehore@chromium.org> |
rockchip/rk3399: Save space for DRAM suspend data
This removes the space allocation for the unused PHY register space. For instance in PHY registers 0-127, only 0-90 are used, so don't save the 91-1
rockchip/rk3399: Save space for DRAM suspend data
This removes the space allocation for the unused PHY register space. For instance in PHY registers 0-127, only 0-90 are used, so don't save the 91-127 registers. This saves about 1.6KB of space.
Change-Id: I0c9f6d9bed8f0c1f3b8b805dfb10cf0c06208919 Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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| bc5c3007 | 04-May-2017 |
Lin Huang <hl@rock-chips.com> |
rockchip: add pmusram section
the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to p
rockchip: add pmusram section
the function pmu_cpuon_entrypoint() need to run in the pmusram, we just copy bin file to pmusram before, now we add pmusram section and link pmu_cpuon_entrypoint() to pmusram directly
Change-Id: Iae31e4c01c480c8e6f565a8f588332b478efdb16 Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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| a9059b96 | 22-Feb-2017 |
Lin Huang <hl@rock-chips.com> |
rockchip/rk3399: fix DRAM gate training issue
The differential signal of DQS need keep low level before gate training. It need enable RPULL and disable PHY side ODT to ensure it when do gate trainin
rockchip/rk3399: fix DRAM gate training issue
The differential signal of DQS need keep low level before gate training. It need enable RPULL and disable PHY side ODT to ensure it when do gate training. But it can not access the PHY registers to do it when perform DFS.So the workaroud as below: It is ensure that the PHY's read gate is landing somewhere in the incoming DQS's pulses before it starts searching for pre-amble window. It need get the rddqs_delay_ps to calculate the start point of gate training for DFS.
Change-Id: I79eabcf4ec9a9c8f4539f68a51f22afba49c72fe Signed-off-by: Lin Huang <hl@rock-chips.com>
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| 7fe08b2b | 01-Jun-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: add document
Add document on HiKey960 platform and how to build.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 28b02e23 | 01-Jun-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: support BL31
Support BL31 on HiKey960 platform. Implement PSCI.
Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 7cb09cb4 | 01-Jun-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: support BL2
BL2 loads MCU firmware & BL31 on hikey960 platform. The MCU firmware is used to implement low power feature.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> |
| 2f2abcf4 | 01-Jun-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
hikey960: support BL1 on hikey960 platform
Support BL1 on HiKey960 platform. When recovery mode is detected, BL1 loads NS BL1U that flushs images into UFS. When normal boot mode is detected, BL1 loa
hikey960: support BL1 on hikey960 platform
Support BL1 on HiKey960 platform. When recovery mode is detected, BL1 loads NS BL1U that flushs images into UFS. When normal boot mode is detected, BL1 loads BL2.
Fix for https://github.com/ARM-software/tf-issues/issues/486
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| 9f505cc2 | 07-Jun-2017 |
Vincent Guittot <vincent.guittot@linaro.org> |
hikey: enable PMF and instrumentations
enable PMF service call and instrumetion for hikey platform
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org> |
| e6a993d4 | 02-Jun-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
stdlib: support AARCH32 in endian head file
Add the support of AARCH32 in endian head file. The code is also imported from FreeBSD 11.0. It's based on commit in below.
commit 4e3a5b429989b4ff621682
stdlib: support AARCH32 in endian head file
Add the support of AARCH32 in endian head file. The code is also imported from FreeBSD 11.0. It's based on commit in below.
commit 4e3a5b429989b4ff621682ff1462f801237bd551 Author: mmel <mmel@FreeBSD.org> Date: Tue Nov 10 12:02:41 2015 +0000
ARM: Remove trailing whitespace from sys/arm/include No functional changes.
Approved by: kib (mentor)
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| b15f31ac | 01-Jun-2017 |
Haojian Zhuang <haojian.zhuang@linaro.org> |
stdlib: import endian head file from freebsd
Import endian head files from FreeBSD 11.0. The link of FreeBSD source code is https://github.com/freebsd/freebsd
Import machine/endian.h from sys/arm64
stdlib: import endian head file from freebsd
Import endian head files from FreeBSD 11.0. The link of FreeBSD source code is https://github.com/freebsd/freebsd
Import machine/endian.h from sys/arm64/include/endian.h in FreeBSD. commit d09ff72cef8e35dbf62f7363dcbf07b453f06243 Author: andrew <andrew@FreeBSD.org> Date: Mon Mar 23 11:54:56 2015 +0000
Add the start of the arm64 machine headers. This is the subset needed to start getting userland libraries building.
Reviewed by: imp Sponsored by: The FreeBSD Foundation
Import sys/endian.h from sys/sys/endian.h in FreeBSD. commit 3c3fa2f5b0c7640373fcbcc3f667bf7794e8e609 Author: phk <phk@FreeBSD.org> Date: Thu May 20 06:16:13 2010 +0000
Fix some way-past-brucification complaints from FlexeLint.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
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| f9a050e4 | 06-Jun-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #969 from Summer-ARM/sq/update-doc
Update the path for firmware_image_package.h in firmware-design.md |
| c46c18c5 | 06-Jun-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
mbedtls: Don't use tf_snprintf if option not defined
If `MBEDTLS_PLATFORM_SNPRINTF_ALT` isn't used, the function `mbedtls_platform_set_snprintf()` isn't defined.
In case a platform uses a different
mbedtls: Don't use tf_snprintf if option not defined
If `MBEDTLS_PLATFORM_SNPRINTF_ALT` isn't used, the function `mbedtls_platform_set_snprintf()` isn't defined.
In case a platform uses a different mbed TLS configuration file than the one provided by the Trusted Firmware, and it doesn't define the mentioned build option, this will result in a build error.
This patch modifies the initialization code so that `mbedtls_platform_set_snprintf()` is only used if `MBEDTLS_PLATFORM_SNPRINTF_ALT` is defined, allowing platforms to use it or not depending on their needs.
Change-Id: I1d5c86d57e9b2871ba463030bf89210ebec5178e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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