| 799bbb1d | 24-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1643 from antonio-nino-diaz-arm/an/libfdt
Update libfdt to version 1.4.7 |
| dfe5c78e | 24-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1639 from chandnich/scmi-update
plat/arm/scmi: introduce plat_css_get_scmi_info API |
| 44445ae5 | 24-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1641 from jeenu-arm/ptrauth
AArch64: Enable lower ELs to use pointer authentication |
| 1ebb915a | 24-Oct-2018 |
Yann Gautier <yann.gautier@st.com> |
docs: stm32mp1: complete compilation and flashing steps
Add U-Boot compilation information. Add a chapter about how to populate SD-card.
Signed-off-by: Yann Gautier <yann.gautier@st.com> |
| 630b011f | 18-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libfdt: Import version v1.4.7
Change-Id: Iad7adaf0b16a3d086594cb3432210ac2c4e207f8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| b7618c93 | 18-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libfdt: Remove current version
The current version of libfdt (1.4.2) has been modified to integrate it in this repository. In order to do a clean import it is needed to remove the current version fi
libfdt: Remove current version
The current version of libfdt (1.4.2) has been modified to integrate it in this repository. In order to do a clean import it is needed to remove the current version first.
Change-Id: I2cab8c8e5632280d282fa7a2f2339768a0ad1e0f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 472158f6 | 23-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
juno: Increase BL2 max size
Version 1.4.7 of libfdt is bigger than the current one (1.4.2) and the current reserved space for BL2 in Juno isn't enough to fit the Trusted Firmware when compiling with
juno: Increase BL2 max size
Version 1.4.7 of libfdt is bigger than the current one (1.4.2) and the current reserved space for BL2 in Juno isn't enough to fit the Trusted Firmware when compiling with clang or armclang.
Change-Id: I7b73394ca60d17f417773f56dd5b3d54495a45a8 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 1a29aba3 | 18-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libc: Integrate strrchr in libc
Change-Id: I3ddc07cb02d73cd7614af7a5b21827aae155f9a0 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| 668afe26 | 18-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libc: Import strrchr from FreeBSD
Imported from lib/libc/string/strrchr.c from commit:
59fd2fb98e4cc7e9bfc89598e28e21d405fd470c
Change-Id: I898206c6f0372d4d211c149ec0fb9522d0a5b01c Signed-off-by:
libc: Import strrchr from FreeBSD
Imported from lib/libc/string/strrchr.c from commit:
59fd2fb98e4cc7e9bfc89598e28e21d405fd470c
Change-Id: I898206c6f0372d4d211c149ec0fb9522d0a5b01c Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 414c9e6d | 23-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1648 from jforissier/qemu-dt-1M
qemu: increase PLAT_QEMU_DT_MAX_SIZE to 1 MiB |
| 8eb39a00 | 23-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1645 from antonio-nino-diaz-arm/an/fix-windows
Makefile: Fix verbose builds on Windows |
| eb746c94 | 23-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1634 from antonio-nino-diaz-arm/an/tzc
tzc: Fix MISRA defects |
| af6491f8 | 15-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
tzc: Fix MISRA defects
The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been fixed.
The types tzc_region_attributes_t and tzc_action_t have been removed and replaced by unsigned int b
tzc: Fix MISRA defects
The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been fixed.
The types tzc_region_attributes_t and tzc_action_t have been removed and replaced by unsigned int because it is not allowed to do logical operations on enums.
Also, fix some address definitions in arm_def.h.
Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 19112b79 | 08-Oct-2018 |
Konstantin Porotchkin <kostap@marvell.com> |
drivers: marvell Add support for Armada-37xx UART
Introduce driver for Marvell Armada-37xx UART console
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> |
| 6f8de19f | 08-Oct-2018 |
Konstantin Porotchkin <kostap@marvell.com> |
drivers: marvell Add Armada-37xx COMPHY driver
Add support for Marvell Armada-3700 COMPHY driver
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@mar
drivers: marvell Add Armada-37xx COMPHY driver
Add support for Marvell Armada-3700 COMPHY driver
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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| 6414dc6d | 07-Oct-2018 |
Konstantin Porotchkin <kostap@marvell.com> |
tools: Move doimage to marvell folder for future add-ons
Move doimage utility from toos/doimage to tools/marvell/doimage. This is done for supporting mode Marvell tools in the future.
Signed-off-by
tools: Move doimage to marvell folder for future add-ons
Move doimage utility from toos/doimage to tools/marvell/doimage. This is done for supporting mode Marvell tools in the future.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
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| 7db0c960 | 27-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: Use the arisc to turn off ARM cores
PSCI requires a core to turn itself off, which we can't do properly by just executing an algorithm on that very core. As a consequence we just put a co
allwinner: Use the arisc to turn off ARM cores
PSCI requires a core to turn itself off, which we can't do properly by just executing an algorithm on that very core. As a consequence we just put a core into WFI on CPU_OFF right now. To fix this let's task the "arisc" management processor (an OpenRISC core) with that task of asserting reset and turning off the core's power domain. We use a handcrafted sequence of OpenRISC instructions to achieve this, and hand this data over to the new sunxi_execute_arisc_code() routine. The commented source code for this routine is provided in a separate file, but the ATF code contains the already encoded instructions as data. The H6 uses the same algorithm, but differs in the MMIO addresses, so provide a SoC (family) specific copy of that code.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 11480b90 | 14-Oct-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: Prepare for executing code on the management processor
The more recent Allwinner SoCs contain an OpenRISC management controller (called arisc or CPUS), which shares the bus with the ARM c
allwinner: Prepare for executing code on the management processor
The more recent Allwinner SoCs contain an OpenRISC management controller (called arisc or CPUS), which shares the bus with the ARM cores, but runs on a separate power domain. This is meant to handle power management with the ARM cores off. There are efforts to run sophisticated firmware on that core (communicating via SCPI with the ARM world), but for now can use it for the rather simple task of helping to turn the ARM cores off. As this cannot be done by ARM code itself (because execution stops at the first of the three required steps), we can offload some instructions to this management processor. This introduces a helper function to hand over a bunch of instructions and triggers execution. We introduce a bakery lock to avoid two cores trying to use that (single) arisc core. The arisc code is expected to put itself into reset after is has finished execution.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| ccd3ab2d | 19-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: PMIC: AXP803: Delay activation of DC1SW switch
There are reports that activating the DC1SW before certain other regulators leads to the PMIC overheating and consequently shutting down. To
allwinner: PMIC: AXP803: Delay activation of DC1SW switch
There are reports that activating the DC1SW before certain other regulators leads to the PMIC overheating and consequently shutting down. To avoid this situation, delay the activation of the DC1SW line until the very end, so those other lines are always activated earlier.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| fb4e9786 | 16-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: PMIC: AXP803: Setup basic voltage rails
Based on the just introduced PMIC FDT framework, we check the DT for more voltage rails that need to be setup early: - DCDC1 is typically the main
allwinner: PMIC: AXP803: Setup basic voltage rails
Based on the just introduced PMIC FDT framework, we check the DT for more voltage rails that need to be setup early: - DCDC1 is typically the main board power rail, used for I/O pins, for instance. The PMIC's default is 3.0V, but 3.3V is what most boards use, so this needs to be adjusted as soon as possible. - DCDC5 is supposed to be connected to the DRAM. The AXP has some configurable reset voltage, but some boards get that wrong, so we better set up this here to avoid over- or under-volting. - DLDO1,2,3 and FLDO1 mostly drive some graphics related IP, some boards need this to be up to enable HDMI or the LCD screen, so we get screen output in U-Boot.
To get the right setup, but still being flexible, we query the DT for the required voltage and whether that regulator is actually used. That gives us some robust default setup U-Boot is happy with.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| ed80c1e2 | 16-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: Scan AXP803 FDT node to setup initial power rails
Now that we have a pointer to the device tree blob, let's use that to do some initial setup of the PMIC: - We scan the DT for the compati
allwinner: Scan AXP803 FDT node to setup initial power rails
Now that we have a pointer to the device tree blob, let's use that to do some initial setup of the PMIC: - We scan the DT for the compatible string to find the PMIC node. - We switch the N_VBUSEN pin if the DT property tells us so. - We scan over all regulator subnodes, and switch DC1SW if there is at least one other node referencing it (judging by the existence of a phandle property in that subnode). This is just the first part of the setup, a follow up patch will setup voltages.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| df301601 | 08-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: Pass FDT address to sunxi_pmic_setup()
For Allwinner boards we now use some heuritistics to find a preloaded .dtb file.
Pass this address on to the PMIC setup routine, so that it can use
allwinner: Pass FDT address to sunxi_pmic_setup()
For Allwinner boards we now use some heuritistics to find a preloaded .dtb file.
Pass this address on to the PMIC setup routine, so that it can use the information contained therein to setup some initial power rails.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| 41538930 | 16-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: Find DTB in BL33 image
The initial PMIC setup for the Allwinner platform is quite board specific, and used to be guarded by reading the .dtb stub *name* from the SPL image in the legacy A
allwinner: Find DTB in BL33 image
The initial PMIC setup for the Allwinner platform is quite board specific, and used to be guarded by reading the .dtb stub *name* from the SPL image in the legacy ATF port. This doesn't scale particularly well, and requires constant maintainance. Instead having the actual .dtb available would be much better, as the PMIC setup requirements could be read from there directly. The only available BL33 for Allwinner platforms so far is U-Boot, and fortunately U-Boot comes with the full featured .dtb, appended to the end of the U-Boot image.
Introduce some code that scans the beginning of the BL33 image to look for the load address, which is followed by the image size. Adding those two values together gives us the end of the image and thus the .dtb address. Verify that this heuristic is valid by sanitising some values and checking the DTB magic.
Print out the DTB address and the model name, if specified in the root node.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| eae5fe79 | 15-Sep-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: A64: Add AXP803 PMIC support to power off the board
Boards with the Allwinner A64 SoC are mostly paired with an AXP803 PMIC, which allows to programmatically power down the board.
Use th
allwinner: A64: Add AXP803 PMIC support to power off the board
Boards with the Allwinner A64 SoC are mostly paired with an AXP803 PMIC, which allows to programmatically power down the board.
Use the newly introduced RSB driver to detect and program the PMIC on boot, then later to turn off the main voltage rails when receiving a PSCI SYSTEM_POWER_OFF command.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| d5ddf67a | 14-Oct-2018 |
Andre Przywara <andre.przywara@arm.com> |
allwinner: H6: Factor out I2C platform setup
In the H6 platform code there is a routine to do the platform initialisation of the R_I2C controller. We will need a very similar setup routine to initia
allwinner: H6: Factor out I2C platform setup
In the H6 platform code there is a routine to do the platform initialisation of the R_I2C controller. We will need a very similar setup routine to initialise the RSB controller on the A64.
Move this code to sunxi_common.c and generalise it to support all SoCs and also to cover the related RSB bus.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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