| 621d5f2a | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update mediatek platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
C
Update mediatek platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: If5a88e1b880bcb2be2278398cf5109a6d877e632
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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|
| b53cde79 | 12-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Remove references to old project name from common files" into integration |
| 2d78a1c6 | 12-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Fix RST rendering problem" into integration |
| 4b5c1f30 | 16-May-2019 |
Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com> |
rcar_gen3: drivers: ddr-a: Update E3 DDR setting
[IPL/DDR]
- Update E3 DDR setting rev.0.12.
Signed-off-by: Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+
rcar_gen3: drivers: ddr-a: Update E3 DDR setting
[IPL/DDR]
- Update E3 DDR setting rev.0.12.
Signed-off-by: Hiroyuki Nakano <hiroyuki.nakano.cj@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: Ic9fb7ed1cd7588fab169a99c4070a8dfc40038dc
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|
| 274e8714 | 11-Jul-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "Aarch64: Fix SCTLR bit definitions" into integration |
| ec92cbcb | 11-Jul-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "plat/intel: Fix SMPLSEL for MMC" into integration |
| f15d7e83 | 11-Jul-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "driver: synopsys: emmc: Do not change FIFO TH as this breaks some platforms" into integration |
| 9e4afb02 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update layerscape platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Update layerscape platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: Ib63ef6e2e4616dd56828bfd3800d5fe2df109934
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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|
| 36cfbf3c | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update intel platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Chan
Update intel platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: I4c7a315cb18b3bbe623e7a7a998d2dac869638a7
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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| 79ca7807 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update rockchip platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
C
Update rockchip platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: Ib7fc54e4141cc4f1952a18241bc18671b36e2168
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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|
| 673406b5 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update renesas platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Ch
Update renesas platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: I51278beacbe6da79853c3f0f0f94cd806fc9652c
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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|
| 1578169e | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update meson platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Chan
Update meson platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: Ib7ec8ed3423e9b9b32be2388520bc27ee28f6370
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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|
| b19498b9 | 03-Jul-2019 |
Justin Chadwell <justin.chadwell@arm.com> |
Update marvell platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Ch
Update marvell platform to not rely on undefined overflow behaviour
This consists of ensuring that the left operand of each shift is
unsigned when the operation might overflow into the sign bit.
Change-Id: I78f386f5ac171d6e52383a3e42003e6fb3e96b57
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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|
| 9ce41ec5 | 04-Jun-2019 |
Tien Hock, Loh <tien.hock.loh@intel.com> |
driver: synopsys: emmc: Do not change FIFO TH as this breaks some platforms
Designware MMC DMA FIFO threshold shouldn't be changed as it broke
Poplar platform's uboot MMC
Signed-off-by: Tien Hock,
driver: synopsys: emmc: Do not change FIFO TH as this breaks some platforms
Designware MMC DMA FIFO threshold shouldn't be changed as it broke
Poplar platform's uboot MMC
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I87ec9d5a78e1bf45119cb73797e402b25a914c13
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|
| b10fae86 | 11-Jul-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Merge "Rename Cortex-Deimos to Cortex-A77" into integration |
| 394fa5d4 | 10-Jul-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
AArch64: Add 128-bit integer types definitions
This patch adds 128-bit integer types int128_t and uint128_t
for "__int128" and "unsigned __int128" supported by GCC and
Clang for AArch64.
Change-Id:
AArch64: Add 128-bit integer types definitions
This patch adds 128-bit integer types int128_t and uint128_t
for "__int128" and "unsigned __int128" supported by GCC and
Clang for AArch64.
Change-Id: I0e646d026a5c12a09fd2c71dc502082052256a94
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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|
| c4655157 | 10-Jul-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Aarch64: Fix SCTLR bit definitions
This patch removes incorrect SCTLR_V_BIT definition and adds
definitions for ARMv8.3-Pauth EnIB, EnDA and EnDB bits.
Change-Id: I1384c0a01f56f3d945833464a82703625
Aarch64: Fix SCTLR bit definitions
This patch removes incorrect SCTLR_V_BIT definition and adds
definitions for ARMv8.3-Pauth EnIB, EnDA and EnDB bits.
Change-Id: I1384c0a01f56f3d945833464a827036252c75c2e
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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|
| f363deb6 | 03-Jul-2019 |
Balint Dobszay <balint.dobszay@arm.com> |
Rename Cortex-Deimos to Cortex-A77
Change-Id: I755e4c42242d9a052570fd1132ca3d937acadb13
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com> |
| bd97f83a | 05-Jul-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Remove references to old project name from common files
The project has been renamed from "Arm Trusted Firmware (ATF)" to
"Trusted Firmware-A (TF-A)" long ago. A few references to the old
project na
Remove references to old project name from common files
The project has been renamed from "Arm Trusted Firmware (ATF)" to
"Trusted Firmware-A (TF-A)" long ago. A few references to the old
project name that still remained in various places have now been
removed.
This change doesn't affect any platform files. Any "ATF" references
inside platform files, still remain.
Change-Id: Id97895faa5b1845e851d4d50f5750de7a55bf99e
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com>
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|
| 0943ea37 | 09-Jul-2019 |
Tien Hock, Loh <tien.hock.loh@intel.com> |
plat/intel: Fix SMPLSEL for MMC
MMC sample select needs to be set properly so that DWMMC clock can be
driven to 50Mhz
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I4a1dde4f6a1
plat/intel: Fix SMPLSEL for MMC
MMC sample select needs to be set properly so that DWMMC clock can be
driven to 50Mhz
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I4a1dde4f6a1e78a36940c57a7a5b162be0bd443a
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|
| 9f0a0bbd | 09-Jul-2019 |
John Tsichritzis <john.tsichritzis@arm.com> |
Fix RST rendering problem
Change-Id: Ic5aab23b549d0bf8e0f7053b46fd59243214aac1
Signed-off-by: John Tsichritzis <john.tsichritzis@arm.com> |
| 21bde92f | 09-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "plat: imx8m: Add caam module init on imx8m" into integration |
| a83d8d2c | 09-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge changes from topic "jts/reword" into integration
* changes:
docs: removing references to GitHub
Change checkpatch.conf after migration to tf.org |
| 010d6ae3 | 13-Jun-2019 |
XiaoDong Huang <derrick.huang@rock-chips.com> |
rockchip: px30: support px30
px30 is a Quad-core soc and Cortex-a53 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspen
rockchip: px30: support px30
px30 is a Quad-core soc and Cortex-a53 inside.
This patch supports the following functions:
1. basic platform setup
2. power up/off cpus
3. suspend/resume cpus
4. suspend/resume system
5. reset system
6. power off system
Change-Id: I73d55aa978096c078242be921abe0ddca9e8f67e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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|
| 2cbeee4d | 08-Jul-2019 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "rpi3: Fix compilation error when stack protector is enabled" into integration |