Merge "Replace dts includes with C preprocessor syntax" into integration

Merge "cert_create: Remove some unused header files inclusions" into integration

Merge "allwinner: Clean up MMU setup" into integration

Merge changes Ib1ed9786,I6c4855c8 into integration

* changes:
plat: imx: Correct the SGIs that used for secure interrupt
plat: imx8mm: Add the support for opteed spd on imx8mq/imx8mm

Merge "docs: Add upcoming Change Log to Table of Contents" into integration

Merge changes from topic "tegra-downstream-01082020" into integration

* changes:
Tegra194: platform handler for entering CPU standby state
Tegra194: memctrl: force viw and vifalr/w transactions

Merge changes from topic "tegra-downstream-01082020" into integration

* changes:
Tegra194: platform handler for entering CPU standby state
Tegra194: memctrl: force viw and vifalr/w transactions as non-coherent
Tegra194: memctrl: fix bug in client order id reg value generation
Tegra194: memctrl: enable mc coalescer
Tegra194: update scratch registers used to read boot parameters
Tegra194: implement system shutdown/reset handlers
Tegra194: mce: support for shutdown and reboot
Tegra194: request CG7 before checking if SC7 is allowed
Tegra194: config to enable/disable strict checking mode
Tegra194: remove unused platform configs
Tegra194: restore XUSB stream IDs on System Resume

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allwinner: Clean up MMU setup

Remove the general BL31 mmap region: it duplicates the existing static
mapping for the entire SRAM region. Use the helper definitions when
applicable to simplify the co

allwinner: Clean up MMU setup

Remove the general BL31 mmap region: it duplicates the existing static
mapping for the entire SRAM region. Use the helper definitions when
applicable to simplify the code and add the MT_EXECUTE_NEVER flag.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Change-Id: I7a6b79e50e4b5c698774229530dd3d2a89e94a6d

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Merge "plat: xilinx: zynqmp: Add checksum support for IPI data" into integration

Merge "zynqmp: pm_service: Add support to query max divisor" into integration

Merge "rpi3/4: Add support for offlining CPUs" into integration

Merge changes from topic "ld/mtd_framework" into integration

* changes:
doc: stm32mp1: Update build command line
fdts: stm32mp1: remove second QSPI flash instance
stm32mp1: Add support for SPI

Merge changes from topic "ld/mtd_framework" into integration

* changes:
doc: stm32mp1: Update build command line
fdts: stm32mp1: remove second QSPI flash instance
stm32mp1: Add support for SPI-NOR boot device
stm32mp1: Add support for SPI-NAND boot device
spi: stm32_qspi: Add QSPI support
fdts: stm32mp1: update for FMC2 pin muxing
stm32mp1: Add support for raw NAND boot device
fmc: stm32_fmc2_nand: Add FMC2 driver support
stm32mp1: Reduce MAX_XLAT_TABLES to 4
io: stm32image: fix device_size type
stm32mp: add DT helper for reg by name
stm32mp1: add compilation flags for boot devices
lib: utils_def: add CLAMP macro
compiler_rt: Import popcountdi2.c and popcountsi2.c files
Add SPI-NOR framework
Add SPI-NAND framework
Add SPI-MEM framework
Add raw NAND framework

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doc: stm32mp1: Update build command line

Add new flags for storage support that must be used in the build
command line. Add the complete build steps for an OP-TEE configuration.

Signed-off-by: Lion

doc: stm32mp1: Update build command line

Add new flags for storage support that must be used in the build
command line. Add the complete build steps for an OP-TEE configuration.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I0c682f6eb0aab83aa929f4ba734d3151c264aeed

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fdts: stm32mp1: remove second QSPI flash instance

Remove second flash node as only one must be used
by QSPI NOR driver.

Change-Id: I48189f2fdf4e0455aabe7d4cd9b2f3d36bb9cfb5
Signed-off-by: Lionel De

fdts: stm32mp1: remove second QSPI flash instance

Remove second flash node as only one must be used
by QSPI NOR driver.

Change-Id: I48189f2fdf4e0455aabe7d4cd9b2f3d36bb9cfb5
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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stm32mp1: Add support for SPI-NOR boot device

STM32MP1 platform is able to boot from SPI-NOR devices.
These modifications add this support using the new
SPI-NOR framework.

Change-Id: I75ff9eba4661f

stm32mp1: Add support for SPI-NOR boot device

STM32MP1 platform is able to boot from SPI-NOR devices.
These modifications add this support using the new
SPI-NOR framework.

Change-Id: I75ff9eba4661f9fb87ce24ced2bacbf8558ebe44
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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stm32mp1: Add support for SPI-NAND boot device

STM32MP1 platform is able to boot from SPI-NAND devices.
These modifications add this support using the new
SPI-NAND framework.

Change-Id: I0d5448bdc4

stm32mp1: Add support for SPI-NAND boot device

STM32MP1 platform is able to boot from SPI-NAND devices.
These modifications add this support using the new
SPI-NAND framework.

Change-Id: I0d5448bdc4bde153c1209e8043846c0f935ae5ba
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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spi: stm32_qspi: Add QSPI support

Add QSPI support (limited to read interface).
Implements the memory map and indirect modes.
Low level driver based on SPI-MEM operations.

Change-Id: Ied698e6de3c17

spi: stm32_qspi: Add QSPI support

Add QSPI support (limited to read interface).
Implements the memory map and indirect modes.
Low level driver based on SPI-MEM operations.

Change-Id: Ied698e6de3c17d977f8b497c81f2e4a0a27c0961
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>

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fdts: stm32mp1: update for FMC2 pin muxing

Include the required FMC2 pinmux definition for the
NAND management.

Change-Id: I80333deacdf3444b2f21f17f2fb5919e569a3591
Signed-off-by: Lionel Debieve <l

fdts: stm32mp1: update for FMC2 pin muxing

Include the required FMC2 pinmux definition for the
NAND management.

Change-Id: I80333deacdf3444b2f21f17f2fb5919e569a3591
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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stm32mp1: Add support for raw NAND boot device

STM32MP1 platform is able to boot from raw NAND devices.
These modifications add this support using the new
raw NAND framework.

Change-Id: I9e9c2b0393

stm32mp1: Add support for raw NAND boot device

STM32MP1 platform is able to boot from raw NAND devices.
These modifications add this support using the new
raw NAND framework.

Change-Id: I9e9c2b03930f98a5ac23f2b6b41945bef43e5043
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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fmc: stm32_fmc2_nand: Add FMC2 driver support

Add fmc2_nand driver support. The driver implements
only read interface for NAND devices.

Change-Id: I3cd037e8ff645ce0d217092b96f33ef41cb7a522
Signed-o

fmc: stm32_fmc2_nand: Add FMC2 driver support

Add fmc2_nand driver support. The driver implements
only read interface for NAND devices.

Change-Id: I3cd037e8ff645ce0d217092b96f33ef41cb7a522
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>

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stm32mp1: Reduce MAX_XLAT_TABLES to 4

For STM32MP1, the address space is 4GB, which can be first divided
in 4 parts of 1GB. This LVL1 table is already mapped regardless
of MAX_XLAT_TABLES.
Fixing ty

stm32mp1: Reduce MAX_XLAT_TABLES to 4

For STM32MP1, the address space is 4GB, which can be first divided
in 4 parts of 1GB. This LVL1 table is already mapped regardless
of MAX_XLAT_TABLES.
Fixing typo: Replace Ko to KB.

BL2/sp_min for platform STM32MP1 requires 4 MMU translation tables:
- a level2 table and a level3 table for identity mapped SYSRAM
- a level2 table mapping 2MB of BootROM runtime resources
- a level2 table mapping 2MB of secure DDR (case BL32 is OP-TEE)

Change-Id: If80cbd4fccc7689b39dd540d6649b1313557f326
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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io: stm32image: fix device_size type

Device size could be more than 4GB, we must
define size as unsigned long long.

Change-Id: I52055cf5c1c15ff18ab9e157aa9b73c8b4fb7b63
Signed-off-by: Lionel Debiev

io: stm32image: fix device_size type

Device size could be more than 4GB, we must
define size as unsigned long long.

Change-Id: I52055cf5c1c15ff18ab9e157aa9b73c8b4fb7b63
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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stm32mp: add DT helper for reg by name

Add a new entry to find register properties by name and
include new assert functions to limit address cells to 1
and size cells to 1.

Change-Id: Ide59a795a05f

stm32mp: add DT helper for reg by name

Add a new entry to find register properties by name and
include new assert functions to limit address cells to 1
and size cells to 1.

Change-Id: Ide59a795a05fb2af36bd07fec15e5a3adf196226
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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stm32mp1: add compilation flags for boot devices

Adds compilation flags to specify which drivers will be
embedded in the generated firmware.

Change-Id: Ie9decc89c3f26cf17e7148a3a4cf337fd35940f7
Sig

stm32mp1: add compilation flags for boot devices

Adds compilation flags to specify which drivers will be
embedded in the generated firmware.

Change-Id: Ie9decc89c3f26cf17e7148a3a4cf337fd35940f7
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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lib: utils_def: add CLAMP macro

Add the standard CLAMP macro. It ensures that
x is between the limits set by low and high.
If low is greater than high the result is undefined.

Signed-off-by: Lione

lib: utils_def: add CLAMP macro

Add the standard CLAMP macro. It ensures that
x is between the limits set by low and high.
If low is greater than high the result is undefined.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: Ia173bb9ca51bc8d9a8ec573bbc15636a94f881f4

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compiler_rt: Import popcountdi2.c and popcountsi2.c files

Imported from the LLVM compiler_rt library on master branch as of
30 Oct 2018 (SVN revision: r345645).

This is to get the __popcountsi2(si_

compiler_rt: Import popcountdi2.c and popcountsi2.c files

Imported from the LLVM compiler_rt library on master branch as of
30 Oct 2018 (SVN revision: r345645).

This is to get the __popcountsi2(si_int a) and __popcountdi2(di_int a)
builtin which are required by a driver that uses a __builtin_popcount().

Change-Id: I8e0d97cebdd90d224690c8ce1b02e657acdddb25
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>

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