1 /* 2 * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BOOT_API_H 8 #define BOOT_API_H 9 10 #include <stdint.h> 11 #include <stdio.h> 12 13 /* 14 * Possible value of boot context field 'auth_status' 15 */ 16 /* No authentication done */ 17 #define BOOT_API_CTX_AUTH_NO 0x0U 18 /* Authentication done and failed */ 19 #define BOOT_API_CTX_AUTH_FAILED 0x1U 20 /* Authentication done and succeeded */ 21 #define BOOT_API_CTX_AUTH_SUCCESS 0x2U 22 23 /* 24 * Possible value of boot context field 'boot_interface_sel' 25 */ 26 27 /* Value of field 'boot_interface_sel' when no boot occurred */ 28 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_NO 0x0U 29 30 /* Boot occurred on SD */ 31 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD 0x1U 32 33 /* Boot occurred on EMMC */ 34 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC 0x2U 35 36 /* Boot occurred on FMC */ 37 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC 0x3U 38 39 /* Boot occurred on QSPI NAND */ 40 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI 0x7U 41 42 /** 43 * @brief Possible value of boot context field 'EmmcXferStatus' 44 */ 45 /* 46 * Possible value of boot context field 'emmc_xfer_status' 47 */ 48 #define BOOT_API_CTX_EMMC_XFER_STATUS_NOT_STARTED 0x0U 49 #define BOOT_API_CTX_EMMC_XFER_STATUS_DATAEND_DETECTED 0x1U 50 #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_OVERALL_TIMEOUT_DETECTED 0x2U 51 #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_DATA_TIMEOUT 0x3U 52 53 /* 54 * Possible value of boot context field 'emmc_error_status' 55 */ 56 #define BOOT_API_CTX_EMMC_ERROR_STATUS_NONE 0x0U 57 #define BOOT_API_CTX_EMMC_ERROR_STATUS_CMD_TIMEOUT 0x1U 58 #define BOOT_API_CTX_EMMC_ERROR_STATUS_ACK_TIMEOUT 0x2U 59 #define BOOT_API_CTX_EMMC_ERROR_STATUS_DATA_CRC_FAIL 0x3U 60 #define BOOT_API_CTX_EMMC_ERROR_STATUS_NOT_ENOUGH_BOOT_DATA_RX 0x4U 61 #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_NOT_FOUND 0x5U 62 #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_SIZE_ZERO 0x6U 63 #define BOOT_API_CTX_EMMC_ERROR_STATUS_IMAGE_NOT_COMPLETE 0x7U 64 65 /* Image Header related definitions */ 66 67 /* Definition of header version */ 68 #define BOOT_API_HEADER_VERSION 0x00010000U 69 70 /* 71 * Magic number used to detect header in memory 72 * Its value must be 'S' 'T' 'M' 0x32, i.e 0x324D5453 as field 73 * 'bootapi_image_header_t.magic' 74 * This identifies the start of a boot image. 75 */ 76 #define BOOT_API_IMAGE_HEADER_MAGIC_NB 0x324D5453U 77 78 /* Definitions related to Authentication used in image header structure */ 79 #define BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES 64 80 #define BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES 64 81 #define BOOT_API_SHA256_DIGEST_SIZE_IN_BYTES 32 82 83 /* Possible values of the field 'boot_api_image_header_t.ecc_algo_type' */ 84 #define BOOT_API_ECDSA_ALGO_TYPE_P256NIST 1 85 #define BOOT_API_ECDSA_ALGO_TYPE_BRAINPOOL256 2 86 87 /* 88 * Cores secure magic numbers 89 * Constant to be stored in bakcup register 90 * BOOT_API_MAGIC_NUMBER_TAMP_BCK_REG_IDX 91 */ 92 #define BOOT_API_A7_CORE0_MAGIC_NUMBER 0xCA7FACE0U 93 #define BOOT_API_A7_CORE1_MAGIC_NUMBER 0xCA7FACE1U 94 95 /* 96 * TAMP_BCK4R register index 97 * This register is used to write a Magic Number in order to restart 98 * Cortex A7 Core 1 and make it execute @ branch address from TAMP_BCK5R 99 */ 100 #define BOOT_API_CORE1_MAGIC_NUMBER_TAMP_BCK_REG_IDX 4U 101 102 /* 103 * TAMP_BCK5R register index 104 * This register is used to contain the branch address of 105 * Cortex A7 Core 1 when restarted by a TAMP_BCK4R magic number writing 106 */ 107 #define BOOT_API_CORE1_BRANCH_ADDRESS_TAMP_BCK_REG_IDX 5U 108 109 /* 110 * Possible value of boot context field 'hse_clock_value_in_hz' 111 */ 112 #define BOOT_API_CTX_HSE_CLOCK_VALUE_UNDEFINED 0U 113 #define BOOT_API_CTX_HSE_CLOCK_VALUE_24_MHZ 24000000U 114 #define BOOT_API_CTX_HSE_CLOCK_VALUE_25_MHZ 25000000U 115 #define BOOT_API_CTX_HSE_CLOCK_VALUE_26_MHZ 26000000U 116 117 /* 118 * Possible value of boot context field 'boot_partition_used_toboot' 119 */ 120 #define BOOT_API_CTX_BOOT_PARTITION_UNDEFINED 0U 121 122 /* Used FSBL1 to boot */ 123 #define BOOT_API_CTX_BOOT_PARTITION_FSBL1 1U 124 125 /* Used FSBL2 to boot */ 126 #define BOOT_API_CTX_BOOT_PARTITION_FSBL2 2U 127 128 /* OTP_CFG0 */ 129 #define BOOT_API_OTP_MODE_WORD_NB 0 130 /* Closed = OTP_CFG0[6] */ 131 #define BOOT_API_OTP_MODE_CLOSED_BIT_POS 6 132 133 #define BOOT_API_RETURN_OK 0x77U 134 135 /* 136 * Boot Context related definitions 137 */ 138 139 /* 140 * Boot core boot configuration structure 141 * Specifies all items of the cold boot configuration 142 * Memory and peripheral part. 143 */ 144 typedef struct { 145 /* 146 * Boot interface used to boot : take values from defines 147 * BOOT_API_CTX_BOOT_INTERFACE_SEL_XXX above 148 */ 149 uint16_t boot_interface_selected; 150 uint16_t boot_interface_instance; 151 uint32_t reserved1[13]; 152 uint32_t otp_afmux_values[3]; 153 uint32_t reserved[5]; 154 uint32_t auth_status; 155 156 /* 157 * Pointers to bootROM External Secure Services 158 * - ECDSA check key 159 * - ECDSA verify signature 160 * - ECDSA verify signature and go 161 */ 162 uint32_t (*bootrom_ecdsa_check_key)(uint8_t *pubkey_in, 163 uint8_t *pubkey_out); 164 uint32_t (*bootrom_ecdsa_verify_signature)(uint8_t *hash_in, 165 uint8_t *pubkey_in, 166 uint8_t *signature, 167 uint32_t ecc_algo); 168 uint32_t (*bootrom_ecdsa_verify_and_go)(uint8_t *hash_in, 169 uint8_t *pub_key_in, 170 uint8_t *signature, 171 uint32_t ecc_algo, 172 uint32_t *entry_in); 173 174 /* 175 * Information specific to an SD boot 176 * Updated each time an SD boot is at least attempted, 177 * even if not successful 178 * Note : This is useful to understand why an SD boot failed 179 * in particular 180 */ 181 uint32_t sd_err_internal_timeout_cnt; 182 uint32_t sd_err_dcrc_fail_cnt; 183 uint32_t sd_err_dtimeout_cnt; 184 uint32_t sd_err_ctimeout_cnt; 185 uint32_t sd_err_ccrc_fail_cnt; 186 uint32_t sd_overall_retry_cnt; 187 /* 188 * Information specific to an eMMC boot 189 * Updated each time an eMMC boot is at least attempted, 190 * even if not successful 191 * Note : This is useful to understand why an eMMC boot failed 192 * in particular 193 */ 194 uint32_t emmc_xfer_status; 195 uint32_t emmc_error_status; 196 uint32_t emmc_nbbytes_rxcopied_tosysram_download_area; 197 uint32_t hse_clock_value_in_hz; 198 /* 199 * Boot partition : 200 * ie FSBL partition on which the boot was successful 201 */ 202 uint32_t boot_partition_used_toboot; 203 204 } __packed boot_api_context_t; 205 206 /* 207 * Image Header related definitions 208 */ 209 210 /* 211 * Structure used to define the common Header format used for FSBL, xloader, 212 * ... and in particular used by bootROM for FSBL header readout. 213 * FSBL header size is 256 Bytes = 0x100 214 */ 215 typedef struct { 216 /* BOOT_API_IMAGE_HEADER_MAGIC_NB */ 217 uint32_t magic; 218 uint8_t image_signature[BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES]; 219 /* 220 * Checksum of payload 221 * 32-bit sum all all payload bytes considered as 8 bit unigned numbers, 222 * discarding any overflow bits. 223 * Use to check UART/USB downloaded image integrity when signature 224 * is not used (i.e bit 0 : 'No_sig_check' = 1 in option flags) 225 */ 226 uint32_t payload_checksum; 227 /* Image header version : should have value BOOT_API_HEADER_VERSION */ 228 uint32_t header_version; 229 /* Image length in bytes */ 230 uint32_t image_length; 231 /* 232 * Image Entry point address : should be in the SYSRAM area 233 * and at least within the download area range 234 */ 235 uint32_t image_entry_point; 236 /* Reserved */ 237 uint32_t reserved1; 238 /* 239 * Image load address : not used by bootROM but to be consistent 240 * with header format for other packages (xloader, ...) 241 */ 242 uint32_t load_address; 243 /* Reserved */ 244 uint32_t reserved2; 245 /* Image version to be compared by bootROM with monotonic 246 * counter value in OTP_CFG4 prior executing the downloaded image 247 */ 248 uint32_t image_version; 249 /* 250 * Option flags: 251 * Bit 0 : No signature check request : 'No_sig_check' 252 * value 1 : for No signature check request 253 * value 0 : No request to bypass the signature check 254 * Note : No signature check is never allowed on a Secured chip 255 */ 256 uint32_t option_flags; 257 /* 258 * Type of ECC algorithm to use : 259 * value 1 : for P-256 NIST algorithm 260 * value 2 : for Brainpool 256 algorithm 261 * See definitions 'BOOT_API_ECDSA_ALGO_TYPE_XXX' above. 262 */ 263 uint32_t ecc_algo_type; 264 /* 265 * OEM ECC Public Key (aka Root pubk) provided in header on 512 bits. 266 * The SHA-256 hash of the OEM ECC pubk must match the one stored 267 * in OTP cells. 268 */ 269 uint8_t ecc_pubk[BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES]; 270 /* Pad up to 256 byte total size */ 271 uint8_t pad[83]; 272 /* Add binary type information */ 273 uint8_t binary_type; 274 } __packed boot_api_image_header_t; 275 276 #endif /* BOOT_API_H */ 277