1 /* 2 * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef BOOT_API_H 8 #define BOOT_API_H 9 10 #include <stdint.h> 11 #include <stdio.h> 12 13 /* 14 * Possible value of boot context field 'auth_status' 15 */ 16 /* No authentication done */ 17 #define BOOT_API_CTX_AUTH_NO 0x0U 18 /* Authentication done and failed */ 19 #define BOOT_API_CTX_AUTH_FAILED 0x1U 20 /* Authentication done and succeeded */ 21 #define BOOT_API_CTX_AUTH_SUCCESS 0x2U 22 23 /* 24 * Possible value of boot context field 'boot_interface_sel' 25 */ 26 27 /* Value of field 'boot_interface_sel' when no boot occurred */ 28 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_NO 0x0U 29 30 /* Boot occurred on SD */ 31 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD 0x1U 32 33 /* Boot occurred on EMMC */ 34 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC 0x2U 35 36 /* Boot occurred on FMC */ 37 #define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC 0x3U 38 39 /** 40 * @brief Possible value of boot context field 'EmmcXferStatus' 41 */ 42 /* 43 * Possible value of boot context field 'emmc_xfer_status' 44 */ 45 #define BOOT_API_CTX_EMMC_XFER_STATUS_NOT_STARTED 0x0U 46 #define BOOT_API_CTX_EMMC_XFER_STATUS_DATAEND_DETECTED 0x1U 47 #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_OVERALL_TIMEOUT_DETECTED 0x2U 48 #define BOOT_API_CTX_EMMC_XFER_STATUS_XFER_DATA_TIMEOUT 0x3U 49 50 /* 51 * Possible value of boot context field 'emmc_error_status' 52 */ 53 #define BOOT_API_CTX_EMMC_ERROR_STATUS_NONE 0x0U 54 #define BOOT_API_CTX_EMMC_ERROR_STATUS_CMD_TIMEOUT 0x1U 55 #define BOOT_API_CTX_EMMC_ERROR_STATUS_ACK_TIMEOUT 0x2U 56 #define BOOT_API_CTX_EMMC_ERROR_STATUS_DATA_CRC_FAIL 0x3U 57 #define BOOT_API_CTX_EMMC_ERROR_STATUS_NOT_ENOUGH_BOOT_DATA_RX 0x4U 58 #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_NOT_FOUND 0x5U 59 #define BOOT_API_CTX_EMMC_ERROR_STATUS_HEADER_SIZE_ZERO 0x6U 60 #define BOOT_API_CTX_EMMC_ERROR_STATUS_IMAGE_NOT_COMPLETE 0x7U 61 62 /* Image Header related definitions */ 63 64 /* Definition of header version */ 65 #define BOOT_API_HEADER_VERSION 0x00010000U 66 67 /* 68 * Magic number used to detect header in memory 69 * Its value must be 'S' 'T' 'M' 0x32, i.e 0x324D5453 as field 70 * 'bootapi_image_header_t.magic' 71 * This identifies the start of a boot image. 72 */ 73 #define BOOT_API_IMAGE_HEADER_MAGIC_NB 0x324D5453U 74 75 /* Definitions related to Authentication used in image header structure */ 76 #define BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES 64 77 #define BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES 64 78 #define BOOT_API_SHA256_DIGEST_SIZE_IN_BYTES 32 79 80 /* Possible values of the field 'boot_api_image_header_t.ecc_algo_type' */ 81 #define BOOT_API_ECDSA_ALGO_TYPE_P256NIST 1 82 #define BOOT_API_ECDSA_ALGO_TYPE_BRAINPOOL256 2 83 84 /* 85 * Cores secure magic numbers 86 * Constant to be stored in bakcup register 87 * BOOT_API_MAGIC_NUMBER_TAMP_BCK_REG_IDX 88 */ 89 #define BOOT_API_A7_CORE0_MAGIC_NUMBER 0xCA7FACE0U 90 #define BOOT_API_A7_CORE1_MAGIC_NUMBER 0xCA7FACE1U 91 92 /* 93 * TAMP_BCK4R register index 94 * This register is used to write a Magic Number in order to restart 95 * Cortex A7 Core 1 and make it execute @ branch address from TAMP_BCK5R 96 */ 97 #define BOOT_API_CORE1_MAGIC_NUMBER_TAMP_BCK_REG_IDX 4U 98 99 /* 100 * TAMP_BCK5R register index 101 * This register is used to contain the branch address of 102 * Cortex A7 Core 1 when restarted by a TAMP_BCK4R magic number writing 103 */ 104 #define BOOT_API_CORE1_BRANCH_ADDRESS_TAMP_BCK_REG_IDX 5U 105 106 /* 107 * Possible value of boot context field 'hse_clock_value_in_hz' 108 */ 109 #define BOOT_API_CTX_HSE_CLOCK_VALUE_UNDEFINED 0U 110 #define BOOT_API_CTX_HSE_CLOCK_VALUE_24_MHZ 24000000U 111 #define BOOT_API_CTX_HSE_CLOCK_VALUE_25_MHZ 25000000U 112 #define BOOT_API_CTX_HSE_CLOCK_VALUE_26_MHZ 26000000U 113 114 /* 115 * Possible value of boot context field 'boot_partition_used_toboot' 116 */ 117 #define BOOT_API_CTX_BOOT_PARTITION_UNDEFINED 0U 118 119 /* Used FSBL1 to boot */ 120 #define BOOT_API_CTX_BOOT_PARTITION_FSBL1 1U 121 122 /* Used FSBL2 to boot */ 123 #define BOOT_API_CTX_BOOT_PARTITION_FSBL2 2U 124 125 /* OTP_CFG0 */ 126 #define BOOT_API_OTP_MODE_WORD_NB 0 127 /* Closed = OTP_CFG0[6] */ 128 #define BOOT_API_OTP_MODE_CLOSED_BIT_POS 6 129 130 #define BOOT_API_RETURN_OK 0x77U 131 132 /* 133 * Boot Context related definitions 134 */ 135 136 /* 137 * Boot core boot configuration structure 138 * Specifies all items of the cold boot configuration 139 * Memory and peripheral part. 140 */ 141 typedef struct { 142 /* 143 * Boot interface used to boot : take values from defines 144 * BOOT_API_CTX_BOOT_INTERFACE_SEL_XXX above 145 */ 146 uint16_t boot_interface_selected; 147 uint16_t boot_interface_instance; 148 uint32_t reserved1[13]; 149 uint32_t otp_afmux_values[3]; 150 uint32_t reserved[5]; 151 uint32_t auth_status; 152 153 /* 154 * Pointers to bootROM External Secure Services 155 * - ECDSA check key 156 * - ECDSA verify signature 157 * - ECDSA verify signature and go 158 */ 159 uint32_t (*bootrom_ecdsa_check_key)(uint8_t *pubkey_in, 160 uint8_t *pubkey_out); 161 uint32_t (*bootrom_ecdsa_verify_signature)(uint8_t *hash_in, 162 uint8_t *pubkey_in, 163 uint8_t *signature, 164 uint32_t ecc_algo); 165 uint32_t (*bootrom_ecdsa_verify_and_go)(uint8_t *hash_in, 166 uint8_t *pub_key_in, 167 uint8_t *signature, 168 uint32_t ecc_algo, 169 uint32_t *entry_in); 170 171 /* 172 * Information specific to an SD boot 173 * Updated each time an SD boot is at least attempted, 174 * even if not successful 175 * Note : This is useful to understand why an SD boot failed 176 * in particular 177 */ 178 uint32_t sd_err_internal_timeout_cnt; 179 uint32_t sd_err_dcrc_fail_cnt; 180 uint32_t sd_err_dtimeout_cnt; 181 uint32_t sd_err_ctimeout_cnt; 182 uint32_t sd_err_ccrc_fail_cnt; 183 uint32_t sd_overall_retry_cnt; 184 /* 185 * Information specific to an eMMC boot 186 * Updated each time an eMMC boot is at least attempted, 187 * even if not successful 188 * Note : This is useful to understand why an eMMC boot failed 189 * in particular 190 */ 191 uint32_t emmc_xfer_status; 192 uint32_t emmc_error_status; 193 uint32_t emmc_nbbytes_rxcopied_tosysram_download_area; 194 uint32_t hse_clock_value_in_hz; 195 /* 196 * Boot partition : 197 * ie FSBL partition on which the boot was successful 198 */ 199 uint32_t boot_partition_used_toboot; 200 201 } __packed boot_api_context_t; 202 203 /* 204 * Image Header related definitions 205 */ 206 207 /* 208 * Structure used to define the common Header format used for FSBL, xloader, 209 * ... and in particular used by bootROM for FSBL header readout. 210 * FSBL header size is 256 Bytes = 0x100 211 */ 212 typedef struct { 213 /* BOOT_API_IMAGE_HEADER_MAGIC_NB */ 214 uint32_t magic; 215 uint8_t image_signature[BOOT_API_ECDSA_SIGNATURE_LEN_IN_BYTES]; 216 /* 217 * Checksum of payload 218 * 32-bit sum all all payload bytes considered as 8 bit unigned numbers, 219 * discarding any overflow bits. 220 * Use to check UART/USB downloaded image integrity when signature 221 * is not used (i.e bit 0 : 'No_sig_check' = 1 in option flags) 222 */ 223 uint32_t payload_checksum; 224 /* Image header version : should have value BOOT_API_HEADER_VERSION */ 225 uint32_t header_version; 226 /* Image length in bytes */ 227 uint32_t image_length; 228 /* 229 * Image Entry point address : should be in the SYSRAM area 230 * and at least within the download area range 231 */ 232 uint32_t image_entry_point; 233 /* Reserved */ 234 uint32_t reserved1; 235 /* 236 * Image load address : not used by bootROM but to be consistent 237 * with header format for other packages (xloader, ...) 238 */ 239 uint32_t load_address; 240 /* Reserved */ 241 uint32_t reserved2; 242 /* Image version to be compared by bootROM with monotonic 243 * counter value in OTP_CFG4 prior executing the downloaded image 244 */ 245 uint32_t image_version; 246 /* 247 * Option flags: 248 * Bit 0 : No signature check request : 'No_sig_check' 249 * value 1 : for No signature check request 250 * value 0 : No request to bypass the signature check 251 * Note : No signature check is never allowed on a Secured chip 252 */ 253 uint32_t option_flags; 254 /* 255 * Type of ECC algorithm to use : 256 * value 1 : for P-256 NIST algorithm 257 * value 2 : for Brainpool 256 algorithm 258 * See definitions 'BOOT_API_ECDSA_ALGO_TYPE_XXX' above. 259 */ 260 uint32_t ecc_algo_type; 261 /* 262 * OEM ECC Public Key (aka Root pubk) provided in header on 512 bits. 263 * The SHA-256 hash of the OEM ECC pubk must match the one stored 264 * in OTP cells. 265 */ 266 uint8_t ecc_pubk[BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES]; 267 /* Pad up to 256 byte total size */ 268 uint8_t pad[83]; 269 /* Add binary type information */ 270 uint8_t binary_type; 271 } __packed boot_api_image_header_t; 272 273 #endif /* BOOT_API_H */ 274