| beff4910 | 22-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/arm/fvp: populate runtime console parameters dynamically" into integration |
| 58fdd608 | 28-Nov-2019 |
Jacky Bai <ping.bai@nxp.com> |
plat: imx8mn: Add imx8mn basic support
Add imx8mn basic support
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: Ibdfcc87700bfaf980e429f3a5fa08515218ae78d |
| de9d0d7c | 21-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Tegra: enable SDEI handling" into integration |
| 6ac1bb30 | 21-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Tegra194: validate C6 power state type" into integration |
| 1a7aa3b3 | 21-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Tegra194: remove support for CPU suspend power down state" into integration |
| 76df74df | 21-May-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "FVP: Add support for passing platform's topology to DTS" into integration |
| e0b3e6b3 | 21-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/fvp: Support for extracting UART serial node info from DT" into integration |
| 12d13430 | 16-Apr-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
plat/arm/fvp: populate runtime console parameters dynamically
We query the UART base address and clk frequency in runtime using fconf getter APIs.
Change-Id: I5f4e84953be5f384472bf90720b706d45cb862
plat/arm/fvp: populate runtime console parameters dynamically
We query the UART base address and clk frequency in runtime using fconf getter APIs.
Change-Id: I5f4e84953be5f384472bf90720b706d45cb86260 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| 447870bf | 24-Mar-2020 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
plat/fvp: Support for extracting UART serial node info from DT
This patch introduces the populate function which leverages a new driver to extract base address and clk frequency properties of the ua
plat/fvp: Support for extracting UART serial node info from DT
This patch introduces the populate function which leverages a new driver to extract base address and clk frequency properties of the uart serial node from HW_CONFIG device tree.
This patch also introduces fdt helper API fdtw_translate_address() which helps in performing address translation.
Change-Id: I053628065ebddbde0c9cb3aa93d838619f502ee3 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| fc721f83 | 20-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "Enable v8.6 WFE trap delays" into integration |
| d886628d | 18-Apr-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: enable SDEI handling
This patch enables SDEI support for all Tegra platforms, with the following configuration settings.
* SGI 8 as the source IRQ * Special Private Event 0 * Three private,
Tegra: enable SDEI handling
This patch enables SDEI support for all Tegra platforms, with the following configuration settings.
* SGI 8 as the source IRQ * Special Private Event 0 * Three private, dynamic events * Three shared, dynamic events * Twelve general purpose explicit events
Verified using TFTF SDEI test suite.
******************************* Summary ******************************* Test suite 'SDEI' Passed ================================= Tests Skipped : 0 Tests Passed : 5 Tests Failed : 0 Tests Crashed : 0 Total tests : 5 =================================
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: I1922069931a7876a4594e53260ee09f2e4f09390
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| a773abb6 | 20-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/fvp: Populate GICv3 parameters dynamically" into integration |
| c6ef55c5 | 20-May-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Tegra: enable stack protection" into integration |
| 6cac724d | 22-Apr-2020 |
johpow01 <john.powell@arm.com> |
Enable v8.6 WFE trap delays
This patch enables the v8.6 extension to add a delay before WFE traps are taken. A weak hook plat_arm_set_twedel_scr_el3 has been added in plat/common/aarch64/plat_common
Enable v8.6 WFE trap delays
This patch enables the v8.6 extension to add a delay before WFE traps are taken. A weak hook plat_arm_set_twedel_scr_el3 has been added in plat/common/aarch64/plat_common.c that disables this feature by default but platform-specific code can override it when needed.
The only hook provided sets the TWED fields in SCR_EL3, there are similar fields in HCR_EL2, SCTLR_EL2, and SCTLR_EL1 to control WFE trap delays in lower ELs but these should be configured by code running at EL2 and/or EL1 depending on the platform configuration and is outside the scope of TF-A.
Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I0a9bb814205efeab693a3d0a0623e62144abba2d
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| 8370c8ce | 12-May-2020 |
laurenw-arm <lauren.wehrmeister@arm.com> |
plat/fvp: Populate GICv3 parameters dynamically
Query the GICD and GICR base addresses in runtime using fconf getter APIs.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id:
plat/fvp: Populate GICv3 parameters dynamically
Query the GICD and GICR base addresses in runtime using fconf getter APIs.
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I309fb2874f3329ddeb8677ddb53ed4c02199a1e9
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| f1a1653c | 19-May-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Fix exception in save/restore of EL2 registers." into integration |
| 30ee3755 | 13-May-2020 |
Max Shvetsov <maksims.svecovs@arm.com> |
Fix exception in save/restore of EL2 registers.
Removing FPEXC32_EL2 from the register save/restore routine for EL2 registers since it is already a part of save/restore routine for fpregs.
Signed-o
Fix exception in save/restore of EL2 registers.
Removing FPEXC32_EL2 from the register save/restore routine for EL2 registers since it is already a part of save/restore routine for fpregs.
Signed-off-by: Max Shvetsov <maksims.svecovs@arm.com> Change-Id: I5ed45fdbf7c8efa8dcfcd96586328d4f6b256bc4
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| 003faaa5 | 13-May-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
FVP: Add support for passing platform's topology to DTS
This patch adds support for passing FVP platform's topology configuration to DTS files for compilation, which allows to build DTBs with correc
FVP: Add support for passing platform's topology to DTS
This patch adds support for passing FVP platform's topology configuration to DTS files for compilation, which allows to build DTBs with correct number of clusters and CPUs. This removes non-existing clusters/CPUs from the compiled device tree blob and fixes reported Linux errors when trying to power on absent CPUs/PEs. If DTS file is passed using FVP_HW_CONFIG_DTS build option from the platform's makefile, FVP_CLUSTER_COUNT, FVP_MAX_CPUS_PER_CLUSTER and FVP_MAX_PE_PER_CPU parameters are used, otherwise CI script will use the default values from the corresponding DTS file.
Change-Id: Idcb45dc6ad5e3eaea18573aff1a01c9344404ab3 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| 611efd96 | 19-May-2020 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Merge "Fix compilation error when ENABLE_PIE=1" into integration |
| ad43c49e | 16-May-2020 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
Cleanup the code for TBBR CoT descriptors
CoT used for BL1 and BL2 are moved to tbbr_cot_bl1.c and tbbr_cot_bl2.c respectively. Common CoT used across BL1 and BL2 are moved to tbbr_cot_common.c.
Si
Cleanup the code for TBBR CoT descriptors
CoT used for BL1 and BL2 are moved to tbbr_cot_bl1.c and tbbr_cot_bl2.c respectively. Common CoT used across BL1 and BL2 are moved to tbbr_cot_common.c.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: I2252ac8a6960b3431bcaafdb3ea4fb2d01b79cf5
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| 359acf77 | 17-May-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: enable stack protection
This patch sets ENABLE_STACK_PROTECTOR=strong and implements the platform support to generate a stack protection canary value.
Signed-off-by: Varun Wadekar <vwadekar@
Tegra: enable stack protection
This patch sets ENABLE_STACK_PROTECTOR=strong and implements the platform support to generate a stack protection canary value.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ia8afe464b5645917b1c77d49305d19c7cd01866a
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| 1a04b2e5 | 17-May-2020 |
Varun Wadekar <vwadekar@nvidia.com> |
Fix compilation error when ENABLE_PIE=1
This patch fixes compilation errors when ENABLE_PIE=1.
<snip> bl31/aarch64/bl31_entrypoint.S: Assembler messages: bl31/aarch64/bl31_entrypoint.S:61: Error: i
Fix compilation error when ENABLE_PIE=1
This patch fixes compilation errors when ENABLE_PIE=1.
<snip> bl31/aarch64/bl31_entrypoint.S: Assembler messages: bl31/aarch64/bl31_entrypoint.S:61: Error: invalid operand (*UND* section) for `~' bl31/aarch64/bl31_entrypoint.S:61: Error: invalid immediate Makefile:1079: recipe for target 'build/tegra/t194/debug/bl31/bl31_entrypoint.o' failed <snip>
Verified by setting 'ENABLE_PIE=1' for Tegra platform builds.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Change-Id: Ifd184f89b86b4360fda86a6ce83fd8495f930bbc
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| 4108abb4 | 15-May-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge "plat/arm/fvp: Support performing SDEI platform setup in runtime" into integration |
| cbf9e84a | 18-Dec-2019 |
Balint Dobszay <balint.dobszay@arm.com> |
plat/arm/fvp: Support performing SDEI platform setup in runtime
This patch introduces dynamic configuration for SDEI setup and is supported when the new build flag SDEI_IN_FCONF is enabled. Instead
plat/arm/fvp: Support performing SDEI platform setup in runtime
This patch introduces dynamic configuration for SDEI setup and is supported when the new build flag SDEI_IN_FCONF is enabled. Instead of using C arrays and processing the configuration at compile time, the config is moved to dts files. It will be retrieved at runtime during SDEI init, using the fconf layer.
Change-Id: If5c35a7517ba00a9f258d7f3e7c8c20cee169a31 Signed-off-by: Balint Dobszay <balint.dobszay@arm.com> Co-authored-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| f95dfc27 | 15-May-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Tegra: introduce support for SMCCC_ARCH_SOC_ID" into integration |