| 4fd4af26 | 16-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #942 from soby-mathew/sm/fix_juno_build_err
Juno: Fix AArch32 sp_min build |
| bbf4c22d | 16-May-2017 |
Soby Mathew <soby.mathew@arm.com> |
Juno: Fix AArch32 sp_min build
The commit abd2aba99ef108e0d0bb5d71c0b6e9c47ca26377 introduced a
regression to the AArch32 sp_min Juno build. This patch fixes that.
Change-Id: I4b141717684d6aee60c76
Juno: Fix AArch32 sp_min build
The commit abd2aba99ef108e0d0bb5d71c0b6e9c47ca26377 introduced a
regression to the AArch32 sp_min Juno build. This patch fixes that.
Change-Id: I4b141717684d6aee60c761ea17f23170aa6708c3
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
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| 093e53f6 | 16-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #937 from rockchip-linux/rk3328_assert
rockchip: rk3328: Add assert check in pmu.c |
| f0019fcc | 16-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #935 from davidcunado-arm/dc/mbed_api
mbedtls: Namespace update for TF specific macros |
| 6cea9451 | 16-May-2017 |
danh-arm <dan.handley@arm.com> |
Merge pull request #934 from sandrine-bailleux-arm/sb/break-headers-circular-dep
Break circular dependency in FVP and Nvidia header files |
| 1bd61d0a | 22-Nov-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
AArch32: Add BL2U support
Add support for firmware upgrade on AArch32.
This patch has been tested on the FVP models.
NOTE: Firmware upgrade on Juno AArch32 is not currently supported.
Change-Id: I
AArch32: Add BL2U support
Add support for firmware upgrade on AArch32.
This patch has been tested on the FVP models.
NOTE: Firmware upgrade on Juno AArch32 is not currently supported.
Change-Id: I1ca8078214eaf86b46463edd14740120af930aec
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
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| a4409008 | 15-Feb-2017 |
dp-arm <dimitris.papastamos@arm.com> |
AArch32: Add `TRUSTED_BOARD_BOOT` support
This patch adds `TRUSTED_BOARD_BOOT` support for AArch32 mode.
To build this patch the "mbedtls/include/mbedtls/bignum.h"
needs to be modified to remove `#
AArch32: Add `TRUSTED_BOARD_BOOT` support
This patch adds `TRUSTED_BOARD_BOOT` support for AArch32 mode.
To build this patch the "mbedtls/include/mbedtls/bignum.h"
needs to be modified to remove `#define MBEDTLS_HAVE_UDBL`
when `MBEDTLS_HAVE_INT32` is defined. This is a workaround
for "https://github.com/ARMmbed/mbedtls/issues/708"
NOTE: TBBR support on Juno AArch32 is not currently supported.
Change-Id: I86d80e30b9139adc4d9663f112801ece42deafcf
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
Co-Authored-By: Yatharth Kochar <yatharth.kochar@arm.com>
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| 6bf14e1d | 15-May-2017 |
tony.xie <tony.xie@rock-chips.com> |
rockchip: rk3328: Add assert check in pmu.c
Add assert() check for cpuson_flags[] and cpuson_entry_point[].
Change-Id: I971fe54c2baa3b4514a3979042341220f5e20901
Signed-off-by: tony.xie <tony.xie@ro
rockchip: rk3328: Add assert check in pmu.c
Add assert() check for cpuson_flags[] and cpuson_entry_point[].
Change-Id: I971fe54c2baa3b4514a3979042341220f5e20901
Signed-off-by: tony.xie <tony.xie@rock-chips.com>
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| 6a0b0d7f | 09-May-2017 |
David Cunado <david.cunado@arm.com> |
Migrate ARM platforms to use TF_MBEDTLS_KEY_ALG
A previous patch superseded the MBEDTLS_KEY_ALG. This patch updates
the ARM platforms to use the new TF_MBEDTLS_KEY_ALG define.
Change-Id: Ie0e1bc272
Migrate ARM platforms to use TF_MBEDTLS_KEY_ALG
A previous patch superseded the MBEDTLS_KEY_ALG. This patch updates
the ARM platforms to use the new TF_MBEDTLS_KEY_ALG define.
Change-Id: Ie0e1bc272e127e879ac58e7cfcbe268751d7688e
Signed-off-by: David Cunado <david.cunado@arm.com>
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| 24c287be | 11-May-2017 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Tegra: Break circular dependency in platform header files
For SoCs T132 and T210, the header file 'platform_def.h' used to include
'tegra_def.h' and vice versa. This patch breaks this circular depen
Tegra: Break circular dependency in platform header files
For SoCs T132 and T210, the header file 'platform_def.h' used to include
'tegra_def.h' and vice versa. This patch breaks this circular dependency
by making 'tegra_def.h' independent.
Change-Id: I45a00a84e6ab8b93d5e9242a9ff65f03e9102a96
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| 144c3f5e | 11-May-2017 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
FVP: Break circular dependency in platform header files
We used to have the following circular dependency in the FVP platform
header files:
+-> arm_def.h ---> platform_def.h ---> fvp_def.h --+
|_
FVP: Break circular dependency in platform header files
We used to have the following circular dependency in the FVP platform
header files:
+-> arm_def.h ---> platform_def.h ---> fvp_def.h --+
|__________________________________________________|
This patch breaks it by not including 'arm_def.h' from 'fvp_def.h'.
Change-Id: I280d906559e3343dd38764029e77c0ea768b4fec
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| fa715215 | 11-May-2017 |
David Cunado <david.cunado@arm.com> |
Add missing SPDX header
A new file added as part of arm-trusted-firmware#927 was missing the
SPDX license identifier - this patch adds the missing identifier.
Change-Id: Id1355f2bdca930b7e65bb54eff
Add missing SPDX header
A new file added as part of arm-trusted-firmware#927 was missing the
SPDX license identifier - this patch adds the missing identifier.
Change-Id: Id1355f2bdca930b7e65bb54eff7e6c764ebb0d96
Signed-off-by: David Cunado <david.cunado@arm.com>
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| d6104f5a | 11-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #927 from jeenu-arm/state-switch
Execution state switch |
| c3e70be1 | 10-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers for remaining files
Change-Id: I7f54f45db65f32481cc05e1bd2c9c683b756e19a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com> |
| a78b73f8 | 10-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #918 from rockchip-linux/rk3328
rockchip: rk3328: support rk3328 |
| 9bb0b3c6 | 10-May-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Revert "rockchip: Remove unused rockchip_pd_pwr_down_wfi function"
This reverts commit b6dcbf588af442fa87721dc707ff9e54d04ff504.
This function wasn't used when it was removed, but it is needed to
c
Revert "rockchip: Remove unused rockchip_pd_pwr_down_wfi function"
This reverts commit b6dcbf588af442fa87721dc707ff9e54d04ff504.
This function wasn't used when it was removed, but it is needed to
compile the new changes proposed for Rockchip platforms.
Change-Id: Ia5bfe1f8398e08431f96923e2f059a83e5cb78d4
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| be2a3127 | 10-May-2017 |
tony.xie <tony.xie@rock-chips.com> |
rockchip: rk3328: Add a missing paragraph for copyright notice.
Change-Id: I78c7e304d3070f66e2ca3bf838c76ee6a2ae3430
Signed-off-by: tony.xie <tony.xie@rock-chips.com> |
| b10d4499 | 16-Feb-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Introduce ARM SiP service to switch execution state
In AArch64, privileged exception levels control the execution state
(a.k.a. register width) of the immediate lower Exception Level; i.e.
whether t
Introduce ARM SiP service to switch execution state
In AArch64, privileged exception levels control the execution state
(a.k.a. register width) of the immediate lower Exception Level; i.e.
whether the lower exception level executes in AArch64 or AArch32 state.
For an exception level to have its execution state changed at run time,
it must request the change by raising a synchronous exception to the
higher exception level.
This patch implements and adds such a provision to the ARM SiP service,
by which an immediate lower exception level can request to switch its
execution state. The execution state is switched if the request is:
- raised from non-secure world;
- raised on the primary CPU, before any secondaries are brought online
with CPU_ON PSCI call;
- raised from an exception level immediately below EL3: EL2, if
implemented; otherwise NS EL1.
If successful, the SMC doesn't return to the caller, but to the entry
point supplied with the call. Otherwise, the caller will observe the SMC
returning with STATE_SW_E_DENIED code. If ARM Trusted Firmware is built
for AArch32, the feature is not supported, and the call will always
fail.
For the ARM SiP service:
- Add SMC function IDs for both AArch32 and AArch64;
- Increment the SiP service minor version to 2;
- Adjust the number of supported SiP service calls.
Add documentation for ARM SiP service.
Fixes ARM-software/tf-issues#436
Change-Id: I4347f2d6232e69fbfbe333b340fcd0caed0a4cea
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| 82cb2c1a | 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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| f4c8aa90 | 21-Feb-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
Add macro to check whether the CPU implements an EL
Replace all instances of checks with the new macro.
Change-Id: I0eec39b9376475a1a9707a3115de9d36f88f8a2a
Signed-off-by: Jeenu Viswambharan <jeenu
Add macro to check whether the CPU implements an EL
Replace all instances of checks with the new macro.
Change-Id: I0eec39b9376475a1a9707a3115de9d36f88f8a2a
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| 7fa3214e | 02-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #896 from sbranden/tf_issue_461
Move defines in utils.h to utils_def.h to fix shared header compile i… |
| 7c1d4342 | 18-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra210: implement 'get_target_pwr_state' handler
This patch implements the handler to calculate the cluster and
system power states for the Tegra210 SoC. The power states
returned by this handler
Tegra210: implement 'get_target_pwr_state' handler
This patch implements the handler to calculate the cluster and
system power states for the Tegra210 SoC. The power states
returned by this handler are used by the PSCI library to decide
cache maintenance operations - cluster v cpu.
Change-Id: I93e4139d4cd8a086b51f328e9a76e91428ebcdab
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 14a1c0ed | 25-Jan-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: fix the NS DRAM address calculation logic
This patch fixes the logic used to calculate the end of NS memory
aperture. The functions allows zero sized NS apertures as that is
a valid requireme
Tegra: fix the NS DRAM address calculation logic
This patch fixes the logic used to calculate the end of NS memory
aperture. The functions allows zero sized NS apertures as that is
a valid requirement for some use cases. e.g. VPR resize.
Change-Id: Ie966e0ea2f9c6888d21c38e734003704094b3720
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| 9d42d23a | 21-Dec-2016 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra: memctrl_v2: zero out NS Video memory carveout region
The video memory carveout has to be re-sized depending on the Video
content. This requires the NS world to send us new base/size values.
B
Tegra: memctrl_v2: zero out NS Video memory carveout region
The video memory carveout has to be re-sized depending on the Video
content. This requires the NS world to send us new base/size values.
Before setting up the new region, we must zero out the previous memory
region, so that the video frames are not leaked to the outside world.
This patch adds the logic to zero out the previous memory carveout
region.
Change-Id: I471167ef7747154440df5c1a5e015fbeb69d9043
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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| e9cb01d9 | 07-Apr-2017 |
Varun Wadekar <vwadekar@nvidia.com> |
Tegra186: calculate proper power state for cluster/system power down
Earlier, we were setting "System Suspend" as the power state for all system
states. This caused incorrect system state during a c
Tegra186: calculate proper power state for cluster/system power down
Earlier, we were setting "System Suspend" as the power state for all system
states. This caused incorrect system state during a cluster power down.
This patch fixes this anomaly and sets the correct power state during a
cluster/system power down.
Change-Id: Ibd002930e0ae103e381e0a19670c3c4d057e7cb7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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