Merge changes from topic "k3-coherency" into integration

* changes:
ti: k3: common: Mark sections for AM65x coherency workaround
ti: k3: common: Allow USE_COHERENT_MEM for K3
ti: k3: common: F

Merge changes from topic "k3-coherency" into integration

* changes:
ti: k3: common: Mark sections for AM65x coherency workaround
ti: k3: common: Allow USE_COHERENT_MEM for K3
ti: k3: common: Fix RO data area size calculation
ti: k3: common: Remove unused STUB macro

show more ...

Merge "plat: allwinner: common: use r_wdog instead of wdog" into integration

Merge changes Ie7766e80,Ia74dbc36 into integration

* changes:
plat: marvell: do not rely on argument passed via smc
plat: marvell: sip: make sure that comphy init will use correct address

rockchip: only include libfdt in non-coreboot cases

While mainline u-boot always expects to submit the devicetree
as platform param, coreboot always uses the existing parameter
structure. As libfdt

rockchip: only include libfdt in non-coreboot cases

While mainline u-boot always expects to submit the devicetree
as platform param, coreboot always uses the existing parameter
structure. As libfdt is somewhat big, it makes sense to limit
its inclusion to where necessary and thus only to non-coreboot
builds.

libfdt itself will get build in all cases, but only the non-
coreboot build will actually reference and thus include it.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I4c5bc28405a14e6070917e48a526bfe77bab2fb7

show more ...

ti: k3: common: Mark sections for AM65x coherency workaround

These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is no

ti: k3: common: Mark sections for AM65x coherency workaround

These sections of code are only needed for the coherency workaround
used for AM65x, if this workaround is not needed then this code
is not either. Mark it off to keep it separated from the rest of
the PSCI implementation.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I113ca6a2a1f7881814ab0a64e5bac57139bc03ef

show more ...

ti: k3: common: Allow USE_COHERENT_MEM for K3

To make the USE_COHERENT_MEM option work we need to add an entry for the
area to our memory map table. Also fixup the alignment here.

Signed-off-by: An

ti: k3: common: Allow USE_COHERENT_MEM for K3

To make the USE_COHERENT_MEM option work we need to add an entry for the
area to our memory map table. Also fixup the alignment here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I1c05477a97646ac73846a711bc38d3746628d847

show more ...

ti: k3: common: Fix RO data area size calculation

The size of the RO data area was calculated by subtracting the area end
address from itself and not the base address due to a typo. Fix this
here.

ti: k3: common: Fix RO data area size calculation

The size of the RO data area was calculated by subtracting the area end
address from itself and not the base address due to a typo. Fix this
here.

Note, this was noticed at a glance thanks to the new aligned formating
of this table.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I994022ac9fc95dc5e37a420714da76081c61cce7

show more ...

ti: k3: common: Remove unused STUB macro

This macro was used when many of these functions were stubbed out,
the macro is not used anymore, remove it.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Cha

ti: k3: common: Remove unused STUB macro

This macro was used when many of these functions were stubbed out,
the macro is not used anymore, remove it.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ida33f92fe3810a89e6e51faf6e93c1d2ada1a2ee

show more ...

hikey: Add define for UART2

Change-Id: I54869151bfc434df66933bd418c70cca9c3d0861
Signed-off-by: Michalis Pappas <mpappas@fastmail.fm>

Merge "rk3399: m0: Fix compiler warnings." into integration

rockchip: add support for rk3288

The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features
with later SoCs.

Working features are general non-secure mode (the gic needs special
love for tha

rockchip: add support for rk3288

The rk3288 is a 4-core Cortex-A12 SoC and shares a lot of features
with later SoCs.

Working features are general non-secure mode (the gic needs special
love for that), psci-based smp bringing cpu cores online and also
taking them offline again, psci-based suspend (the simpler variant
also included in the linux kernel, deeper suspend following later)
and I was also already able to test HYP-mode and was able to boot
a virtual kernel using kvm.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: Ibaaa583b2e78197591a91d254339706fe732476a

show more ...

rockchip: add common aarch32 support

There are a number or ARMv7 Rockchip SoCs that are very similar in their
bringup routines to the existing arm64 SoCs, so there is quite a high
commonality possib

rockchip: add common aarch32 support

There are a number or ARMv7 Rockchip SoCs that are very similar in their
bringup routines to the existing arm64 SoCs, so there is quite a high
commonality possible here.

Things like virtualization also need psci and hyp-mode and instead of
trying to cram this into bootloaders like u-boot, barebox or coreboot
(all used in the field), re-use the existing infrastructure in TF-A
for this (both Rockchip plat support and armv7 support in general).

So add core support for aarch32 Rockchip SoCs, with actual soc support
following in a separate patch.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I298453985b5d8434934fc0c742fda719e994ba0b

show more ...

rockchip: rk3328: drop double declaration of entry_point storage

The cpuson_entry_point and cpuson_flags are already declared in
plat_private.h so there is no need to have it again declared in
the l

rockchip: rk3328: drop double declaration of entry_point storage

The cpuson_entry_point and cpuson_flags are already declared in
plat_private.h so there is no need to have it again declared in
the local pmu.h, especially as it may cause conflicts when the
other type changes.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I80ae0e23d22f67109ed96f8ac059973b6de2ce87

show more ...

rockchip: Allow socs with undefined wfe check bits

Some older socs like the rk3288 do not have the necessary registers
to check the wfi/wfe state of the cpu cores. Allow this case an "just"
do an ad

rockchip: Allow socs with undefined wfe check bits

Some older socs like the rk3288 do not have the necessary registers
to check the wfi/wfe state of the cpu cores. Allow this case an "just"
do an additional delay similar to how the Linux kernel handles smp
right now.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I0f67af388b06b8bfb4a9bac411b4900ac266a77a

show more ...

rockchip: move pmusram assembler code to a aarch64 subdir

The current code doing power-management from sram is highly
arm64-specific so should live in a corresponding subdirectory
and not in the com

rockchip: move pmusram assembler code to a aarch64 subdir

The current code doing power-management from sram is highly
arm64-specific so should live in a corresponding subdirectory
and not in the common area.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Change-Id: I3b79ac26f70fd189d4d930faa6251439a644c5d9

show more ...

rk3399: m0: Fix compiler warnings.

GCC complains for quite some versions, when compiling the M0 firmware
for Rockchip's rk3399 platform, about an invalid type of function 'main':

warning: return

rk3399: m0: Fix compiler warnings.

GCC complains for quite some versions, when compiling the M0 firmware
for Rockchip's rk3399 platform, about an invalid type of function 'main':

warning: return type of 'main' is not 'int' [-Wmain]

This patch addresses this, by renaming the function to 'm0_main'.

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I10887f2bda6bdb48c5017044c264139004f7c785

show more ...

Merge changes from topic "av/console-register" into integration

* changes:
Console: Remove Arm console unregister on suspend
Console: Allow to register multiple times

Merge changes from topic "k3-sequence-fix" into integration

* changes:
ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID
ti: k3: drivers: ti_sci: Cleanup sequence ID usage
ti:

Merge changes from topic "k3-sequence-fix" into integration

* changes:
ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID
ti: k3: drivers: ti_sci: Cleanup sequence ID usage
ti: k3: drivers: sec_proxy: Use direction definitions
ti: k3: drivers: sec_proxy: Fix printf format specifiers

show more ...

Merge changes from topic "k3-cleanups" into integration

* changes:
ti: k3: common: Align elements of map region table
ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default
ti: k3: common:

Merge changes from topic "k3-cleanups" into integration

* changes:
ti: k3: common: Align elements of map region table
ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default
ti: k3: common: Remove shared RAM space
ti: k3: common: Drop _ADDRESS from K3_USART_BASE to match other defines

show more ...

Console: Remove Arm console unregister on suspend

Change-Id: Ie649b3c367a93db057eeaee7e83fa3e43f8c2607
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>

ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID

When we get a sequence ID that does not match what we expect then the we
are looking at is not the one we are expecting and so we er

ti: k3: drivers: ti_sci: Retry message receive on bad sequence ID

When we get a sequence ID that does not match what we expect then the we
are looking at is not the one we are expecting and so we error out. We
can also assume this message is a stale message left in the queue, in
this case we can read in the next message and check again for our
message. Switch to doing that here. We only retry a set number of times
so we don't lock the system if our message is actually lost and will
never show up.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I6c8186ccc45e646d3ba9d431f7d4c451dcd70c5c

show more ...

ti: k3: drivers: ti_sci: Cleanup sequence ID usage

The sequence ID can be set with a message to identify it when it is
responded to in the response queue. We assign each message a number and
check f

ti: k3: drivers: ti_sci: Cleanup sequence ID usage

The sequence ID can be set with a message to identify it when it is
responded to in the response queue. We assign each message a number and
check for this same number to detect response mismatches.

Start this at 0 and increase it by one for each message sent, even ones
that do not request or wait for a response as one may still be delivered
in some cases and we want to detect this.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: I72b4d1ef98bf1c1409d9db9db074af8dfbcd83ea

show more ...

ti: k3: drivers: sec_proxy: Use direction definitions

The direction of a thread should be explicitly compared to avoid
confusion. Also fixup message wording based on this direction.

Signed-off-by:

ti: k3: drivers: sec_proxy: Use direction definitions

The direction of a thread should be explicitly compared to avoid
confusion. Also fixup message wording based on this direction.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ia3cf9413cd23af476bb5d2e6d70bee15234cbd11

show more ...

ti: k3: drivers: sec_proxy: Fix printf format specifiers

The ID of a thread is not used outside for printing it out when
something goes wrong. The specifier used is also not consistent.
Instead of s

ti: k3: drivers: sec_proxy: Fix printf format specifiers

The ID of a thread is not used outside for printing it out when
something goes wrong. The specifier used is also not consistent.
Instead of storing the thread ID, store its name and print that.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Id137c2f8dfdd5c599e220193344ece903f80af7b

show more ...

Merge changes from topic "yg/optee" into integration

* changes:
stm32mp1: add OP-TEE support
stm32mp1: fix TZC400 configuration against non-secure DDR
stm32mp1: remove useless define
stm32mp

Merge changes from topic "yg/optee" into integration

* changes:
stm32mp1: add OP-TEE support
stm32mp1: fix TZC400 configuration against non-secure DDR
stm32mp1: remove useless define
stm32mp: split stm32mp_io_setup function

show more ...