| 2d39b397 | 26-Aug-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): zero out the DDR memory space
For Morello SoC, we use ECC capability for the RDIMMs which require the entire DDR memory space to be zeroed out before it can be accessed.
Change-Id: I
feat(morello): zero out the DDR memory space
For Morello SoC, we use ECC capability for the RDIMMs which require the entire DDR memory space to be zeroed out before it can be accessed.
Change-Id: Icbe9916f9a2d3c4ce839d8bf7f867efa18f33e23 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| 8840711f | 26-Aug-2021 |
Manoj Kumar <manoj.kumar3@arm.com> |
feat(morello): add TARGET_PLATFORM flag
The same folder "plat/arm/board/morello" is going to be used by both Morello FVP and Morello SoC platforms.
TARGET_PLATFORM build flag has been introduced to
feat(morello): add TARGET_PLATFORM flag
The same folder "plat/arm/board/morello" is going to be used by both Morello FVP and Morello SoC platforms.
TARGET_PLATFORM build flag has been introduced to differentiate between the two platforms
Change-Id: I3e94da372a3f1ba810b4259b85dd4c204306c359 Signed-off-by: Manoj Kumar <manoj.kumar3@arm.com> Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
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| c5f3de8d | 11-Dec-2021 |
Chandni Cherukuri <chandni.cherukuri@arm.com> |
fix(arm): use PLAT instead of TARGET_PLATFORM
There might be several platforms which use the TARGET_PLATFORM build option to differentiate the code between the platform variants.
Use of TARGET_PLAT
fix(arm): use PLAT instead of TARGET_PLATFORM
There might be several platforms which use the TARGET_PLATFORM build option to differentiate the code between the platform variants.
Use of TARGET_PLATFORM in the common code leads to build failures instead use PLAT build option.
Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com> Change-Id: I9724caf875bd56225e035ecffa8b9ca1a50d3401
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| 7468be12 | 14-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge changes from topic "fconf_get_index" into integration
* changes: feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP feat(fconf): add a helper to get image index |
| acf28c26 | 18-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(st): protect UART during platform init
Protect the UART instance used for serial boot with UART used for console.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Change-Id: Ieee1557b
feat(st): protect UART during platform init
Protect the UART instance used for serial boot with UART used for console.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Change-Id: Ieee1557b34e7baa81594c3fbf0513191737027bf
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| aafff043 | 18-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): update console management for SP_min
Use stm32mp_uart_console_setup() in SP_min setup. Adapt the function stm32mp_uart_console_setup() for BL32 (no reset, add CONSOLE_FLAG_RUNTIME un
feat(stm32mp1): update console management for SP_min
Use stm32mp_uart_console_setup() in SP_min setup. Adapt the function stm32mp_uart_console_setup() for BL32 (no reset, add CONSOLE_FLAG_RUNTIME under DEBUG.
Change-Id: Ib2d35c8d285dafb680aa218872ad679cbf43d0ed Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 86240942 | 18-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): improve console management in BL2
Use newly created function stm32mp_uart_console_setup(). And remove now useless code.
Change-Id: Ib8d0319d3f4f54309848bc225b58608cea73bad9 Sign
refactor(stm32mp1): improve console management in BL2
Use newly created function stm32mp_uart_console_setup(). And remove now useless code.
Change-Id: Ib8d0319d3f4f54309848bc225b58608cea73bad9 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| 53612f72 | 18-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(plat/st): add a function to configure console
To ease console configuration, a dedicated function is created: stm32mp_uart_console_setup(). The code will also be common for the different BLs.
feat(plat/st): add a function to configure console
To ease console configuration, a dedicated function is created: stm32mp_uart_console_setup(). The code will also be common for the different BLs.
Change-Id: Idf3cad756f125ca2313cf30b1311637a9df8f27f Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| a6bfa75c | 16-Dec-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add stm32_get_boot_interface function
Add function stm32_get_boot_interface to get the current boot interface from information saved in the TAMP register.
Change-Id: I23af43c68eeaeb
feat(stm32mp1): add stm32_get_boot_interface function
Add function stm32_get_boot_interface to get the current boot interface from information saved in the TAMP register.
Change-Id: I23af43c68eeaebe4c45920a57d739117aea3fbb1 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| 4dc77a35 | 10-Dec-2021 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): move stm32_save_boot_interface()
The function stm32_save_boot_interface()is moved to stm32mp1_private.c file. The files stm32mp1_context.{c,h} are removed. As return is always 0,
refactor(stm32mp1): move stm32_save_boot_interface()
The function stm32_save_boot_interface()is moved to stm32mp1_private.c file. The files stm32mp1_context.{c,h} are removed. As return is always 0, change the function to return void. Call it earlier, to be able to use it when configuring console.
Change-Id: I8986e1257dc8e8708eab044a51ea1f2426b16597 Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
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| d7176f03 | 04-Jun-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
fix(stm32mp1): deconfigure UART RX pins
Those pins are configured by ROM code, for serial boot use cases. Their configs are reset if the boot is done on UART, but not on USB. This should then be don
fix(stm32mp1): deconfigure UART RX pins
Those pins are configured by ROM code, for serial boot use cases. Their configs are reset if the boot is done on UART, but not on USB. This should then be done in TF-A. This has to be done after clock init, and before console is configured.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I29a9694e25fcf1665360dd71f73937f769c43b52
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| 737ad29b | 11-Jun-2021 |
Yann Gautier <yann.gautier@foss.st.com> |
feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration: analog, no-pull, speed low, and its secure configuration, thanks to stm32_gpio_is_se
feat(stm32_gpio): add a function to reset a pin
Add set_gpio_reset_cfg() to set a pin in its reset configuration: analog, no-pull, speed low, and its secure configuration, thanks to stm32_gpio_is_secure_at_reset().
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: I7b73c3636859f97fcc57f81cf68b42efc727922e
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| ce21ee89 | 15-Oct-2021 |
Yann Gautier <yann.gautier@st.com> |
refactor(stm32mp1): sort compilation flags
Sort the compilation flags in platform.mk when checking and defining them for C files.
Change-Id: I5a08399c89ede4c0bd8697045706122732205db5 Signed-off-by:
refactor(stm32mp1): sort compilation flags
Sort the compilation flags in platform.mk when checking and defining them for C files.
Change-Id: I5a08399c89ede4c0bd8697045706122732205db5 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| c10f3a45 | 10-Nov-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): add sign-compare warning
Add -Wsign-compare to TF_CFLAGS to check signedness comparison during STM32MP1 platform compilation.
Change-Id: I4cada49622f44258d3e0da4560a566de9c7d54b3 Si
feat(stm32mp1): add sign-compare warning
Add -Wsign-compare to TF_CFLAGS to check signedness comparison during STM32MP1 platform compilation.
Change-Id: I4cada49622f44258d3e0da4560a566de9c7d54b3 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| b7066086 | 13-Dec-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP
Thanks to dyn_cfg_dtb_info_get_index(), we can check if TOS_FW_CONFIG is inside the FIP partition. If not we can skip its treatment when populating F
feat(stm32mp1): skip TOS_FW_CONFIG if not in FIP
Thanks to dyn_cfg_dtb_info_get_index(), we can check if TOS_FW_CONFIG is inside the FIP partition. If not we can skip its treatment when populating FIP images.
Change-Id: If5623eabd1ba484549d4a908d4a6f43325b36875 Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| ab453050 | 09-Dec-2021 |
Edward-JW Yang <edward-jw.yang@mediatek.com> |
feat(plat/mediatek/mt8195): improve SPM wakeup log
To enhance debug efficiency, modify wakeup log: 1. Redefine strings of wakeup reason for readability. 2. Indicate 26M clock on/off state of previou
feat(plat/mediatek/mt8195): improve SPM wakeup log
To enhance debug efficiency, modify wakeup log: 1. Redefine strings of wakeup reason for readability. 2. Indicate 26M clock on/off state of previous suspend. 3. Add warning log if SPM cannot get wakeup reason.
BUG=b:205201535 TEST=build pass
Signed-off-by: Edward-JW Yang <edward-jw.yang@mediatek.corp-partner.google.com> Change-Id: Icb14ebb08958da225969abd3cdd9e471d232c7eb
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| 14d9727e | 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.3
Update the revision number in the revision management file.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com> Signed-off-by: To
feat(plat/rcar3): update IPL and Secure Monitor Rev.3.0.3
Update the revision number in the revision management file.
Signed-off-by: Hideyuki Nitta <hideyuki.nitta.jf@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I19f713de68e62a2ed3f4ec08c31b35af6a4014ef
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| ffb725be | 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
feat(plat/rcar3): modify type for Internal function argument
Modify the type of the variable that stores the value for MPIDR in the internal function from uint64_t to u_register_t.
Signed-off-by: K
feat(plat/rcar3): modify type for Internal function argument
Modify the type of the variable that stores the value for MPIDR in the internal function from uint64_t to u_register_t.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ib5bda93d5432e0412132bddf41ead8ee3fcf9e46
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| d9912cf3 | 02-Nov-2021 |
Takuya Sakata <takuya.sakata.wz@bp.renesas.com> |
feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53
Add new function so that the value of bit at WUPMSKCA57/53, which points to CPU other than the BOOT CPU, is 1 at initialization.
feat(plat/rcar3): modify sequence for update value for WUPMSKCA57/53
Add new function so that the value of bit at WUPMSKCA57/53, which points to CPU other than the BOOT CPU, is 1 at initialization. Modify sequence so that value of each bit for CPU at WUPMSKCA57/53 is basically 0 and target bit value is changed to 1 only when CPU_OFF.
Signed-off-by: Koichi Yamaguchi <koichi.yamaguchi.zb@hitachi.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Id5dafc04e1dbaf265c8b67b903c335bb1af49914
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| 714ca37d | 10-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(plat/zynqmp): disable the -mbranch-protection flag" into integration |
| c6b29198 | 10-Dec-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mb_critical_data" into integration
* changes: docs(measured-boot): add a platform function for critical data feat(fvp): measure critical data |
| 67abd476 | 07-Dec-2021 |
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> |
feat(plat/zynqmp): disable the -mbranch-protection flag
With new gcc11.2 by default the -mbranch-protection is set to "standard" which is leading to increase the text section by 4Kb. As the ZynqMP u
feat(plat/zynqmp): disable the -mbranch-protection flag
With new gcc11.2 by default the -mbranch-protection is set to "standard" which is leading to increase the text section by 4Kb. As the ZynqMP uses the ARMv8 architecture, so there is no impact when we disable the branch protection. These instructions do not provide the branch protection in architectures before Armv8.3-A.
Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Change-Id: I36f7a55abf99f50df2ee265255598d83b1f480c6
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| 97af8baf | 10-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(measured-boot): add generic macros for using Crypto library" into integration |
| 4f53c130 | 09-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "fix(plat/socionext/synquacer): initialise CNTFRQ in Non Secure CNTBaseN" into integration |
| 590fd53d | 09-Dec-2021 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "refactor(plat/synquacer): update PSCI system_off handling" into integration |