| 5161cfde | 29-Mar-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
fix(layerscape): fix coverity issue
Check return value of mmap_add_dynamic_region().
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I84e257b3052371e18af158c3254f42a1bae0da10 |
| ad88c370 | 28-Mar-2022 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "rme-attest" into integration
* changes:
feat(rme): add dummy realm attestation key to RMMD
feat(rme): add dummy platform token to RMMD |
| c5bf1b09 | 01-Mar-2022 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.
The expected OTP NAME can
refactor(stm32mp1): drop the "st,stm32-nvmem-layout" node
Simplify the DT parsing by removing the parsing of the nvmem layout node
with "st,stm32-nvmem-layout" compatible.
The expected OTP NAME can directly be found in a sub-node named
NAME@ADDRESS of the BSEC node, the NVMEM provider node.
This patch also removes this specific binding introduced for TF-A.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic703385fad1bec5bef1cee583fbe9fbbf6aea216
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| b9a6dbc1 | 21-Mar-2022 |
Yann Gautier <yann.gautier@st.com> |
refactor(st): remove useless includes
The stm32mp_dt.c file does not need anything from DDR header files.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibfe23204d68ee2e863cd2eda3d725
refactor(st): remove useless includes
The stm32mp_dt.c file does not need anything from DDR header files.
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Ibfe23204d68ee2e863cd2eda3d725baa830b729a
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| a0435105 | 22-Mar-2022 |
Soby Mathew <soby.mathew@arm.com> |
feat(rme): add dummy realm attestation key to RMMD
Add a dummy realm attestation key to RMMD, and return it on request.
The realm attestation key is requested with an SMC with the following
paramete
feat(rme): add dummy realm attestation key to RMMD
Add a dummy realm attestation key to RMMD, and return it on request.
The realm attestation key is requested with an SMC with the following
parameters:
* Fid (0xC400001B2).
* Attestation key buffer PA (the realm attestation key is copied
at this address by the monitor).
* Attestation key buffer length as input and size of realm
attesation key as output.
* Type of elliptic curve.
Signed-off-by: Tamas Ban <tamas.ban@arm.com>
Signed-off-by: Subhasish Ghosh <subhasish.ghosh@arm.com>
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
Change-Id: I12d8d98fd221f4638ef225c9383374ddf6e65eac
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| 0b0e6766 | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(ls1088aqds): add ls1088aqds board support
Add QDS support for ls1088a.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gup
feat(ls1088aqds): add ls1088aqds board support
Add QDS support for ls1088a.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6c7a7a23fa6b9ba01c011a7e6237f8063d45e261
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| 2771dd02 | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(ls1088ardb): add ls1088ardb board support
The LS1088A reference design board provides a comprehensive platform
that enables design and evaluation of the product (LS1088A processor).
Signed-off
feat(ls1088ardb): add ls1088ardb board support
The LS1088A reference design board provides a comprehensive platform
that enables design and evaluation of the product (LS1088A processor).
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If4ca24fcee7a4c2c514303853955f1b00298c0e5
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| 9df5ba05 | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(ls1088a): add new SoC platform ls1088a
LS1088A is a cost-effective, powerefficient, and highly integrated
SoC device featuring eight extremely power-efficient 64-bit ARM
Cortex-A53 cores with E
feat(ls1088a): add new SoC platform ls1088a
LS1088A is a cost-effective, powerefficient, and highly integrated
SoC device featuring eight extremely power-efficient 64-bit ARM
Cortex-A53 cores with ECC-protected L1 and L2 cache memories for
high reliability, running up to 1.6 GHz.
This patch is to add ls1088a SoC support in TF-A.
Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: rocket <rod.dorris@nxp.com>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Id9ebcdad1beab07ea81a41955edd4f471d6cf090
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| ceae3743 | 08-Mar-2021 |
Biwen Li <biwen.li@nxp.com> |
refactor(layerscape): refine comparison of inerconnection
Refine the code to be compatible with new CCN504 which is used
by ls2088a.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei
refactor(layerscape): refine comparison of inerconnection
Refine the code to be compatible with new CCN504 which is used
by ls2088a.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I2e2b3bbb9392862b04bf8a89dfb9575bf4be974a
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| 602cf53b | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(layerscape): add soc helper macro definition for chassis 3
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I27b3a1f597de84dc2a007798e54eb919c877281a |
| 9550ce9d | 05-Jan-2021 |
Biwen Li <biwen.li@nxp.com> |
feat(layerscape): add CHASSIS 3 support for tbbr
Support CHASSIS 3.0(such as SoC LS1088A).
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6084
feat(layerscape): add CHASSIS 3 support for tbbr
Support CHASSIS 3.0(such as SoC LS1088A).
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I60843bc4d604f0de1d91c6d3ad5eb4921cdcc91a
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| 0d396d64 | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(layerscape): define more chassis 3 hardware address
Add base address definiton for Chassis 3 platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6041b93c9e9bb49af60743bd277ac
feat(layerscape): define more chassis 3 hardware address
Add base address definiton for Chassis 3 platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I6041b93c9e9bb49af60743bd277ac7cc6f1b9da8
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| cd960f50 | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(lx2): enable DDR erratas for lx2 platforms
Enable DDR erratas for lx2 platforms.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ia2cf6ed077acf81882247153ec38bda708a6f007 |
| 3412716b | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(layerscape): print DDR errata information
Print Errata information in debug mode.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I70d6baa4dc3ffd79fedbc827555268d8f06605c7 |
| 291adf52 | 13-Jul-2021 |
Pankit Garg <pankit.garg@nxp.com> |
feat(nxp-ddr): add workaround for errata A050958
Set the receiver gain to max value to recover
cold temp marginality issue for phy-gen2
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-b
feat(nxp-ddr): add workaround for errata A050958
Set the receiver gain to max value to recover
cold temp marginality issue for phy-gen2
Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: If639fa3ed404cf6e1b8abcc2b7137db1fdd0b2c2
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| 85bd0929 | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(layerscape): add new soc errata a010539 support
Add new soc errata a010539 support.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Idbd8caaac12da8ab4f39dc0019cb656bcf4f3401 |
| 785ee93c | 18-Feb-2022 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
feat(layerscape): add new soc errata a009660 support
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: Ice37155d971dec5c610026043e34b64f761fc1b7 |
| e2818d0a | 11-Jan-2021 |
Biwen Li <biwen.li@nxp.com> |
fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically
Fix build issue of mmap_add_ddr_region_dynamically():
ls_bl2_el3_setup.c:(.text.bl2_plat_preload_setup+0x28): undefined
reference
fix(layerscape): fix build issue of mmap_add_ddr_region_dynamically
Fix build issue of mmap_add_ddr_region_dynamically():
ls_bl2_el3_setup.c:(.text.bl2_plat_preload_setup+0x28): undefined
reference to mmap_add_ddr_region_dynamically
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Change-Id: I74a8b4c2337fc0646d6acb16ce61755c5efbdf38
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| 0f9159b7 | 22-Mar-2022 |
Soby Mathew <soby.mathew@arm.com> |
feat(rme): add dummy platform token to RMMD
Add a dummy platform token to RMMD and return it on request. The
platform token is requested with an SMC with the following parameters:
* Fid (0xC4000
feat(rme): add dummy platform token to RMMD
Add a dummy platform token to RMMD and return it on request. The
platform token is requested with an SMC with the following parameters:
* Fid (0xC40001B3).
* Platform token PA (the platform token is copied at this address by
the monitor). The challenge object needs to be passed by
the caller in this buffer.
* Platform token len.
* Challenge object len.
When calling the SMC, the platform token buffer received by EL3 contains
the challenge object. It is not used on the FVP and is only printed to
the log.
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
Signed-off-by: Subhasish Ghosh <subhasish.ghosh@arm.com>
Change-Id: I8b2f1d54426c04e76d7a3baa6b0fbc40b0116348
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| 91e52cf0 | 22-Mar-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(tegra194/ras): remove incorrect erxctlr assert" into integration |
| 2ff6a49e | 22-Mar-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "stm32mp13" into integration
* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(s
Merge changes from topic "stm32mp13" into integration
* changes:
feat(stm32mp1): select platform compilation either by flag or DT
feat(stm32mp1-fdts): add support for STM32MP13 DK board
feat(stm32mp1-fdts): add DDR support for STM32MP13
feat(stm32mp1-fdts): add st-io_policies node for STM32MP13
feat(stm32mp1): updates for STM32MP13 device tree compilation
feat(stm32mp1-fdts): add DT files for STM32MP13
feat(dt-bindings): add TZC400 bindings for STM32MP13
feat(stm32mp1): add "Boot mode" management for STM32MP13
feat(stm32mp1): manage HSLV on STM32MP13
feat(stm32mp1): add sdmmc compatible in platform define
feat(st-sdmmc2): allow compatible to be defined in platform code
feat(stm32mp1): update IO compensation on STM32MP13
feat(stm32mp1): call pmic_voltages_init() in platform init
feat(st-pmic): add pmic_voltages_init() function
feat(stm32mp1): update CFG0 OTP for STM32MP13
feat(stm32mp1): usb descriptor update for STM32MP13
feat(st-clock): add clock driver for STM32MP13
feat(dt-bindings): add bindings for STM32MP13
feat(stm32mp1): get CPU info from SYSCFG on STM32MP13
feat(stm32mp1): use only one filter for TZC400 on STM32MP13
feat(stm32mp1): add a second fixed regulator
feat(stm32mp1): adaptations for STM32MP13 image header
feat(stm32mp1): update boot API for header v2.0
feat(stm32mp1): update IP addresses for STM32MP13
feat(stm32mp1): add part numbers for STM32MP13
feat(stm32mp1): chip rev. Z is 0x1001 on STM32MP13
feat(stm32mp1): update BACKUP_BOOT_MODE for STM32MP13
feat(stm32mp1): stm32mp_is_single_core() for STM32MP13
feat(stm32mp1): remove unsupported features on STM32MP13
feat(stm32mp1): update memory mapping for STM32MP13
feat(stm32mp1): introduce new flag for STM32MP13
feat(st): update stm32image tool for header v2
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| c5edb59d | 22-Mar-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "fix(plat/arm): fix SP count limit without dual root CoT" into integration |
| 99a5d8d0 | 01-Apr-2021 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): select platform compilation either by flag or DT
To choose either STM32MP13 or STM32MP15, one of the two flags can be
set to 1 in the make command line. Or the platform selection can
feat(stm32mp1): select platform compilation either by flag or DT
To choose either STM32MP13 or STM32MP15, one of the two flags can be
set to 1 in the make command line. Or the platform selection can be
done with device tree name, if it begins with stm32mp13 or stm32mp15.
Change-Id: I72f42665c105b71a84b4952ef3fcd6c06ae4598c
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| e6fddbc9 | 12-Jan-2021 |
Nicolas Le Bayon <nicolas.le.bayon@st.com> |
feat(stm32mp1-fdts): add DDR support for STM32MP13
Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.co
feat(stm32mp1-fdts): add DDR support for STM32MP13
Add dedicated device tree files for STM32MP13.
Add new DDR compatible for STM32MP13x.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ib1bb9ad8cb2ab9f5f81549635d6604093aeb99d3
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| d38eaf99 | 25-Feb-2020 |
Yann Gautier <yann.gautier@st.com> |
feat(stm32mp1): updates for STM32MP13 device tree compilation
Add stm32mp13_bl2.dtsi files.
Update compilation variables for STM32MP13.
Change-Id: Ia3aa3abfe09c04c1a57541e565c212aa094e285c
Signed-o
feat(stm32mp1): updates for STM32MP13 device tree compilation
Add stm32mp13_bl2.dtsi files.
Update compilation variables for STM32MP13.
Change-Id: Ia3aa3abfe09c04c1a57541e565c212aa094e285c
Signed-off-by: Yann Gautier <yann.gautier@st.com>
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