1 /* 2 * Copyright (c) 2019-2022, Intel Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef SOCFPGA_SIP_SVC_H 8 #define SOCFPGA_SIP_SVC_H 9 10 11 /* SiP status response */ 12 #define INTEL_SIP_SMC_STATUS_OK 0 13 #define INTEL_SIP_SMC_STATUS_BUSY 0x1 14 #define INTEL_SIP_SMC_STATUS_REJECTED 0x2 15 #define INTEL_SIP_SMC_STATUS_ERROR 0x4 16 #define INTEL_SIP_SMC_RSU_ERROR 0x7 17 18 /* SiP mailbox error code */ 19 #define GENERIC_RESPONSE_ERROR 0x3FF 20 21 /* SMC SiP service function identifier */ 22 23 /* FPGA Reconfig */ 24 #define INTEL_SIP_SMC_FPGA_CONFIG_START 0xC2000001 25 #define INTEL_SIP_SMC_FPGA_CONFIG_WRITE 0x42000002 26 #define INTEL_SIP_SMC_FPGA_CONFIG_COMPLETED_WRITE 0xC2000003 27 #define INTEL_SIP_SMC_FPGA_CONFIG_ISDONE 0xC2000004 28 #define INTEL_SIP_SMC_FPGA_CONFIG_GET_MEM 0xC2000005 29 30 /* FPGA Bitstream Flag */ 31 #define FLAG_PARTIAL_CONFIG BIT(0) 32 #define FLAG_AUTHENTICATION BIT(1) 33 #define CONFIG_TEST_FLAG(_flag, _type) (((flag) & FLAG_##_type) \ 34 == FLAG_##_type) 35 36 /* Secure Register Access */ 37 #define INTEL_SIP_SMC_REG_READ 0xC2000007 38 #define INTEL_SIP_SMC_REG_WRITE 0xC2000008 39 #define INTEL_SIP_SMC_REG_UPDATE 0xC2000009 40 41 /* Remote System Update */ 42 #define INTEL_SIP_SMC_RSU_STATUS 0xC200000B 43 #define INTEL_SIP_SMC_RSU_UPDATE 0xC200000C 44 #define INTEL_SIP_SMC_RSU_NOTIFY 0xC200000E 45 #define INTEL_SIP_SMC_RSU_RETRY_COUNTER 0xC200000F 46 #define INTEL_SIP_SMC_RSU_DCMF_VERSION 0xC2000010 47 #define INTEL_SIP_SMC_RSU_COPY_DCMF_VERSION 0xC2000011 48 #define INTEL_SIP_SMC_RSU_MAX_RETRY 0xC2000012 49 #define INTEL_SIP_SMC_RSU_COPY_MAX_RETRY 0xC2000013 50 #define INTEL_SIP_SMC_RSU_DCMF_STATUS 0xC2000014 51 #define INTEL_SIP_SMC_RSU_COPY_DCMF_STATUS 0xC2000015 52 53 54 /* ECC */ 55 #define INTEL_SIP_SMC_ECC_DBE 0xC200000D 56 57 /* Generic Command */ 58 #define INTEL_SIP_SMC_GET_ROM_PATCH_SHA384 0xC2000040 59 60 /* Send Mailbox Command */ 61 #define INTEL_SIP_SMC_MBOX_SEND_CMD 0xC200001E 62 #define INTEL_SIP_SMC_FIRMWARE_VERSION 0xC200001F 63 #define INTEL_SIP_SMC_HPS_SET_BRIDGES 0xC2000032 64 65 /* Mailbox Command */ 66 #define INTEL_SIP_SMC_GET_USERCODE 0xC200003D 67 68 /* SiP Definitions */ 69 70 /* ECC DBE */ 71 #define WARM_RESET_WFI_FLAG BIT(31) 72 #define SYSMGR_ECC_DBE_COLD_RST_MASK (SYSMGR_ECC_OCRAM_MASK |\ 73 SYSMGR_ECC_DDR0_MASK |\ 74 SYSMGR_ECC_DDR1_MASK) 75 76 /* Non-mailbox SMC Call */ 77 #define INTEL_SIP_SMC_SVC_VERSION 0xC2000200 78 79 /* SMC function IDs for SiP Service queries */ 80 #define SIP_SVC_CALL_COUNT 0x8200ff00 81 #define SIP_SVC_UID 0x8200ff01 82 #define SIP_SVC_VERSION 0x8200ff03 83 84 /* SiP Service Calls version numbers */ 85 #define SIP_SVC_VERSION_MAJOR 1 86 #define SIP_SVC_VERSION_MINOR 0 87 88 89 /* Structure Definitions */ 90 struct fpga_config_info { 91 uint32_t addr; 92 int size; 93 int size_written; 94 uint32_t write_requested; 95 int subblocks_sent; 96 int block_number; 97 }; 98 99 /* Function Definitions */ 100 101 bool is_address_in_ddr_range(uint64_t addr, uint64_t size); 102 103 /* ECC DBE */ 104 bool cold_reset_for_ecc_dbe(void); 105 uint32_t intel_ecc_dbe_notification(uint64_t dbe_value); 106 107 #endif /* SOCFPGA_SIP_SVC_H */ 108