| b5fa6563 | 18-May-2016 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
Introduce arm_setup_page_tables() function
This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and do
Introduce arm_setup_page_tables() function
This patch introduces the arm_setup_page_tables() function to set up page tables on ARM platforms. It replaces the arm_configure_mmu_elx() functions and does the same thing except that it doesn't enable the MMU at the end. The idea is to reduce the amount of per-EL code that is generated by the C preprocessor by splitting the memory regions definitions and page tables creation (which is generic) from the MMU enablement (which is the only per-EL configuration).
As a consequence, the call to the enable_mmu_elx() function has been moved up into the plat_arch_setup() hook. Any other ARM standard platforms that use the functions `arm_configure_mmu_elx()` must be updated.
Change-Id: I6f12a20ce4e5187b3849a8574aac841a136de83d
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| 6f511c47 | 04-Jul-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #651 from Xilinx/zynqmp_uart
zynqmp: Make UART selectable |
| 7de544ac | 10-Jun-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Add option to select between Cadence UARTs
Add build time option 'cadence1' for ZYNQMP_CONSOLE to select the 2nd UART available in the SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@x
zynqmp: Add option to select between Cadence UARTs
Add build time option 'cadence1' for ZYNQMP_CONSOLE to select the 2nd UART available in the SoC.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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| 50f7101a | 15-Jun-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #650 from Xilinx/zynqmp-updates
Zynqmp updates |
| 2ba68959 | 07-Jun-2016 |
Mirela Simonovic <mirela.simonovic@aggios.com> |
zynqmp: pm: Added NODE_IPI_APU slave node ID in pm_defs.h
NODE_IPI_APU is the node ID of APU's IPI device. If APU should be woken-up on an IPI from FPD power down, this node shall be set as the wake
zynqmp: pm: Added NODE_IPI_APU slave node ID in pm_defs.h
NODE_IPI_APU is the node ID of APU's IPI device. If APU should be woken-up on an IPI from FPD power down, this node shall be set as the wake-up source upon suspend.
Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com>
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| a29f50c9 | 29-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Remove double ';'
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
| 55eae0d4 | 29-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Fix spelling of endianness
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> |
| e3f0391e | 19-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: PSCI: Wait for FW completing wake requests
Powering up cores didn't wait for the PMUFW to complete the request, which could result in cores failing to power up in Linux.
Reported-by: Kotesw
zynqmp: PSCI: Wait for FW completing wake requests
Powering up cores didn't wait for the PMUFW to complete the request, which could result in cores failing to power up in Linux.
Reported-by: Koteswararao Nayudu <kotin@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 648fe99e | 20-May-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Ignore the revision field of the IDCODE
The revision field may change between silicon revisions without changing the mapping to a part. This avoids errors like: ERROR: Incorrect XILINX IDC
zynqmp: Ignore the revision field of the IDCODE
The revision field may change between silicon revisions without changing the mapping to a part. This avoids errors like: ERROR: Incorrect XILINX IDCODE 0x14738093, maskid 0x4600093 NOTICE: ATF running on XCZUUNKN/EP108 v3/RTL5.1 at 0xfffe5000 on parts with a newer revision.
Reported-by: Love Kumar <love.kumar@xilinx.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Tested-by: Love Kumar <love.kumar@xilinx.com>
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| 03b80773 | 20-May-2016 |
Stefan Krsmanovic <stefan.krsmanovic@aggios.com> |
zynqmp: Add bakery_lock to protect APU_PWRCTRL register access
Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure in order to save valid state. If more than one CPU is access
zynqmp: Add bakery_lock to protect APU_PWRCTRL register access
Access to APU_PWRCTRL register is protected during suspend/wakeup pocedure in order to save valid state. If more than one CPU is accessing this register it can be left in corrupted state during read-modify-write process.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 8212f1f0 | 20-May-2016 |
Stefan Krsmanovic <stefan.krsmanovic@aggios.com> |
zynqmp: Put pm_secure_lock in coherent memory region
DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region. ARM Trusted Firmware design guide, chapter 11 states that bakery_lock d
zynqmp: Put pm_secure_lock in coherent memory region
DEFINE_BAKERY_LOCK() macro is used to put lock in coherent memory region. ARM Trusted Firmware design guide, chapter 11 states that bakery_lock data structures should be allocated in coherent memory region because it is accessed by multiple CPUs with mismatched shareability, cacheability and memory attributes.
Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| fc65b87b | 12-May-2016 |
Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> |
zynqmp: pm: Implement pm_register_notifier PM API function
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: So
zynqmp: pm: Implement pm_register_notifier PM API function
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 493541d6 | 12-May-2016 |
Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> |
zynqmp: pm: Implemented 'get_op_characteristic' PM API call
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: S
zynqmp: pm: Implemented 'get_op_characteristic' PM API call
Signed-off-by: Anes Hadziahmetagic <anes.hadziahmetagic@aggios.com> Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| df4c59c5 | 12-May-2016 |
Filip Drazic <filip.drazic@aggios.com> |
zynqmp: pm: Removed double declaration of pm_ipi_send functions
Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-
zynqmp: pm: Removed double declaration of pm_ipi_send functions
Functions pm_ipi_send and pm_ipi_send_sync are declared in pm_ipi.h
Signed-off-by: Filip Drazic <filip.drazic@aggios.com> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 142ec043 | 22-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Reduce mapped memory area
The GIC area is specified larger than it needs to be and can be reduced. Which allows reducing the structures required for the translation tables as well. This resu
zynqmp: Reduce mapped memory area
The GIC area is specified larger than it needs to be and can be reduced. Which allows reducing the structures required for the translation tables as well. This results in a reduction of memory footprint of ca. 4k.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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| f3d3b316 | 19-May-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Implement plat_get_syscnt_freq2 on platforms
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all upstream platforms.
Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe |
| b96f77c6 | 15-Jun-2015 |
Michal Simek <michal.simek@xilinx.com> |
zynqmp: FSBL->ATF handover
Parse the parameter structure the FSBL populates, to populate the bl32 and bl33 image structures.
Cc: Sarat Chand Savitala <saratcha@xilinx.com> Cc: petalinux-dev@xilinx.
zynqmp: FSBL->ATF handover
Parse the parameter structure the FSBL populates, to populate the bl32 and bl33 image structures.
Cc: Sarat Chand Savitala <saratcha@xilinx.com> Cc: petalinux-dev@xilinx.com Signed-off-by: Michal Simek <michal.simek@xilinx.com> [ SB - pass pointers to structs instead of structs - handle execution state parameter - populate bl32 SPSR - add documentation - query bootmode and consider missing handoff parameters an error when not in JTAG boot mode ] Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
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| 2cb5bac9 | 18-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Introduce zynqmp_get_bootmode
Provide a function to retrieve the bootmode.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> |
| e543e79b | 18-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Remove bogus comment
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> |
| 01555332 | 14-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Revise memory configuration options
Drop the current configuration options for selecting the location of the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION). The new configuration
zynqmp: Revise memory configuration options
Drop the current configuration options for selecting the location of the ATF and TSP (ZYNQMP_ATF_LOCATION, ZYNQMP_TSP_RAM_LOCATION). The new configuration provides one default setup (ATF in OCM, BL32 in DRAM). Additionally, the new configuration options - ZYNQMP_ATF_MEM_BASE - ZYNQMP_ATF_MEM_SIZE - ZYNQMP_BL32_MEM_BASE - ZYNQMP_BL32_MEM_SIZE can be used to freely configure the memory locations used for ATF and secure payload.
Also, allow setting the BL33 entry point via PRELOADED_BL33_BASE.
Cc: petalinux-dev@xilinx.com Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Alistair Francis <alistair.francis@xilinx.com>
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| c073fda1 | 14-Apr-2016 |
Yatharth Kochar <yatharth.kochar@arm.com> |
Move `plat_get_syscnt_freq()` to arm_common.c
This patch moves the definition for `plat_get_syscnt_freq()` from arm_bl31_setup.c to arm_common.c. This could be useful in case a delay timer needs to
Move `plat_get_syscnt_freq()` to arm_common.c
This patch moves the definition for `plat_get_syscnt_freq()` from arm_bl31_setup.c to arm_common.c. This could be useful in case a delay timer needs to be installed based on the generic timer in other BLs. This patch also modifies the return type for this function from `uint64_t` to `unsigned long long` within ARM and other platform files.
Change-Id: Iccdfa811948e660d4fdcaae60ad1d700e4eda80d
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| 0a48e2bd | 11-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: ipi: Consolidate IRQ #defines
The bit mapping in I(E|D|S)R are equal, consolidate the #defines.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.si
zynqmp: ipi: Consolidate IRQ #defines
The bit mapping in I(E|D|S)R are equal, consolidate the #defines.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com>
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| 8b901406 | 11-Apr-2016 |
Soren Brinkmann <soren.brinkmann@xilinx.com> |
zynqmp: Remove unused/redundant #includes
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> |
| 9ff67fa6 | 26-Nov-2015 |
Gerald Lejeune <gerald.lejeune@st.com> |
Dump platform-defined regs in crash reporting
It is up to the platform to implement the new plat_crash_print_regs macro to report all relevant platform registers helpful for troubleshooting.
plat_c
Dump platform-defined regs in crash reporting
It is up to the platform to implement the new plat_crash_print_regs macro to report all relevant platform registers helpful for troubleshooting.
plat_crash_print_regs merges or calls previously defined plat_print_gic_regs and plat_print_interconnect_regs macros for each existing platforms.
NOTE: THIS COMMIT REQUIRES ALL PLATFORMS THAT ENABLE THE `CRASH_REPORTING` BUILD FLAG TO MIGRATE TO USE THE NEW `plat_crash_print_regs()` MACRO. BY DEFAULT, `CRASH_REPORTING` IS ENABLED IN DEBUG BUILDS FOR ALL PLATFORMS.
Fixes: arm-software/tf-issues#373
Signed-off-by: Gerald Lejeune <gerald.lejeune@st.com>
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| 3e4b8fdc | 08-Apr-2016 |
Soby Mathew <soby.mathew@arm.com> |
Migrate platform ports to the new xlat_tables library
This patch modifies the upstream platform port makefiles to use the new xlat_tables library files. This patch also makes mmap region setup commo
Migrate platform ports to the new xlat_tables library
This patch modifies the upstream platform port makefiles to use the new xlat_tables library files. This patch also makes mmap region setup common between AArch64 and AArch32 for FVP platform port. The file `fvp_common.c` is moved from the `plat/arm/board/fvp/aarch64` folder to the parent folder as it is not specific to AArch64.
Change-Id: Id2e9aac45e46227b6f83cccfd1e915404018ea0b
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