fix(xilinx): limit pm_feature_check deprecation warning to once per boot

The deprecation warning in pm_feature_check() is being displayed
multiple times during boot, causing log spam.

Modify the wa

fix(xilinx): limit pm_feature_check deprecation warning to once per boot

The deprecation warning in pm_feature_check() is being displayed
multiple times during boot, causing log spam.

Modify the warning to display only once per boot session by using
a static boolean flag. This maintains the deprecation notification
while reducing log verbosity.

Change-Id: Ie2ae265b0e0b4d08c6341f1870258b970f5a1fc7
Signed-off-by: Devanshi Chauhan <Devanshi.ChauhanAlpeshbhai@amd.com>

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fix(versal-net): remove client-side code of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: If2559ca106dbb60d761d0f8c7deeb86c1f30af16
Si

fix(versal-net): remove client-side code of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: If2559ca106dbb60d761d0f8c7deeb86c1f30af16
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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fix(versal): remove client-side implementation of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: I34ac563b88b98e484cf33993545c0151db936

fix(versal): remove client-side implementation of PM_ABORT_SUSPEND

PM_ABORT_SUSPEND API is removed; client-side implementation is no
longer needed.

Change-Id: I34ac563b88b98e484cf33993545c0151db9362e0
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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fix(xilinx): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Note: This change removes code that is c

fix(xilinx): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Note: This change removes code that is common between versal and
versal_net.

Change-Id: Ia7bfbcf2bbf80309beda7f8fa1ecf87de2591e2e
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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fix(zynqmp): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Change-Id: Iac7a651273401b6737c92ad26cb5

fix(zynqmp): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Change-Id: Iac7a651273401b6737c92ad26cb5f990b512889b
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration

* changes:
chore(xilinx): add deprecation warning to pm_feature_check
refactor(xilinx): rename eemi_feature_check to tf

Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration

* changes:
chore(xilinx): add deprecation warning to pm_feature_check
refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

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fix(versal2): handle debugfs specific APIs before EEMI handler

In Versal Gen 2 SoC, all PM APIs use the extended SMC format including
the debugfs-specific APIs. So, call eemi_psci_debugfs_handler be

fix(versal2): handle debugfs specific APIs before EEMI handler

In Versal Gen 2 SoC, all PM APIs use the extended SMC format including
the debugfs-specific APIs. So, call eemi_psci_debugfs_handler before
eemi_api_handler. This ensures that debugfs-specific PM APIs are handled
correctly by TF-A and are not forwarded to the PLM firmware.

Change-Id: Ibab08c851c853a8f4272783b210040ddf7291d76
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@amd.com>

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chore(xilinx): add deprecation warning to pm_feature_check

Add deprecation warning to pm_feature_check() function to inform
users that this API will be removed in the 2027.1 release and
they should

chore(xilinx): add deprecation warning to pm_feature_check

Add deprecation warning to pm_feature_check() function to inform
users that this API will be removed in the 2027.1 release and
they should migrate to tfa_api_feature_check() for TF-A specific
feature checks.

This warning helps customers prepare for the upcoming API removal
and encourages migration to the correct function.

Change-Id: Icab5eb6f1a552553b1cc1215aa683430733667bd
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

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refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

Rename eemi_feature_check() to tfa_api_feature_check() for better
clarity. The new name clearly indicates its purpose of handling

refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

Rename eemi_feature_check() to tfa_api_feature_check() for better
clarity. The new name clearly indicates its purpose of handling TF-A
specific feature checks and improves code maintainability.

Change-Id: Ia74b12933427ccadbc8ede5ddc2a7a4822766264
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

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fix(versal): modify IPI4 and IPI5 trigger bit definitions

The IPI4 and IPI5 trigger bit definitions are incorrect according
to the register database specification. This discrepancy can
cause IPI com

fix(versal): modify IPI4 and IPI5 trigger bit definitions

The IPI4 and IPI5 trigger bit definitions are incorrect according
to the register database specification. This discrepancy can
cause IPI communication failures between processing units in
Versal SoCs. So, modified the trigger bits to align the software
definitions with the hardware register specification as documented
in the register database.

Change-Id: I1e32961124daf8e5635906fb615e98a650130f27
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

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feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE acr

feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE across all AMD-Xilinx platforms.

Change-Id: I95465e29ac8a9370da135c2113203c3206ecfec0
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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fix(xilinx): incorrect usage of SECURE_FLAG for psci

As per the PSCI specification, the PSCI SMC call always expects from
the NON_SECURE world. However, in the platform specific file SECURE
flag was

fix(xilinx): incorrect usage of SECURE_FLAG for psci

As per the PSCI specification, the PSCI SMC call always expects from
the NON_SECURE world. However, in the platform specific file SECURE
flag was passed to the firmware which is incorrect. Pass NON_SECURE
flag from the platform specific file to the firmware in order to
align with the PSCI specification.

Change-Id: Iabe2cb45467cf63fe36626d323513ff05548eb3b
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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feat(xilinx): deprecate PM_REQ_SUSPEND EEMI API

Deprecate the use of the PM_REQ_SUSPEND EEMI API from the Versal,
Versal-Net and Versal Gen 2 platforms. This is because the API is
intended for suspe

feat(xilinx): deprecate PM_REQ_SUSPEND EEMI API

Deprecate the use of the PM_REQ_SUSPEND EEMI API from the Versal,
Versal-Net and Versal Gen 2 platforms. This is because the API is
intended for suspending cross-subsystems, and the same functionality
can now be achieved using the ForcePowerdown API. Therefore,
continuing to use PM_REQ_SUSPEND API may no longer be necessary.
Hence deprecating the same.

Change-Id: I967d7803da4cf433fabfe8d87c32305954f69884
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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Merge "feat(versal): add support to clear PM specific data" into integration

Merge "fix(versal-net): fix coverity violation prevent buffer overrun" into integration

fix(xilinx): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Iee582e3bdb3d51fd53938009d2

fix(xilinx): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Iee582e3bdb3d51fd53938009d29a921569616566
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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Merge "fix(xilinx): typecast operands to match data type" into integration

feat(versal): add support to clear PM specific data

During a kexec restart, only the kernel is reloaded while TF-A state
remains unchanged, causing a mismatch between kernel and TF-A states.
To reso

feat(versal): add support to clear PM specific data

During a kexec restart, only the kernel is reloaded while TF-A state
remains unchanged, causing a mismatch between kernel and TF-A states.
To resolve this, add support for the TF_A_CLEAR_PM_STATE API, which
clears TF-A PM state.

Change-Id: I6b460f8cd4293381d3a9c574dd144521b8e54f8a
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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fix(versal-net): fix coverity violation prevent buffer overrun

Coverity reported potential memory corruption issues in
bl31_early_platform_setup2() (CIDs 487973 and 487972):

- CID 487973 (ARRAY_VS_

fix(versal-net): fix coverity violation prevent buffer overrun

Coverity reported potential memory corruption issues in
bl31_early_platform_setup2() (CIDs 487973 and 487972):

- CID 487973 (ARRAY_VS_SINGLETON): "&boot_mode" was passed to
get_boot_mode(), which treats the argument as an array. This could
lead to misinterpretation of adjacent memory.
- CID 487972 (OVERRUN): Passing "&boot_mode" (a single 4-byte element)
allowed get_boot_mode() to access out-of-bounds indices, resulting in
a possible buffer overrun.

Changed boot_mode from a single variable to an array sized according
to the return payload, preventing singleton pointer violation.

Change-Id: I53944db10b694d1599da0e5b1fbd30a97e83803c
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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fix(xilinx): fix missing security flag in suspend path

Suspend flow was always programming wakeup sources with a fixed
secure flag, regardless of whether the caller was secure or
non-secure. This ma

fix(xilinx): fix missing security flag in suspend path

Suspend flow was always programming wakeup sources with a fixed
secure flag, regardless of whether the caller was secure or
non-secure. This may cause incorrect behavior for non-secure
suspend requests.

Fix this by passing the caller's security state (flag) through
pm_client_suspend() and pm_client_set_wakeup_sources() to ensure
that wakeup sources are set with the correct context.

Fixes: <4697164a3fa8> ("plat: xilinx: versal: Mark IPI calls secure/non-secure")

Change-Id: I5fcf65788a54010b4759b0d08e4f54c6e5037e47
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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feat(zynqmp): mark IPI calls secure/non-secure

Use BIT24 of the IPI command header from payload[0] to identify the
caller's security state. If the SMC caller is non-secure, set BIT24
to indicate a n

feat(zynqmp): mark IPI calls secure/non-secure

Use BIT24 of the IPI command header from payload[0] to identify the
caller's security state. If the SMC caller is non-secure, set BIT24
to indicate a non-secure origin.

The mechanism is already present in Versal, Versal NET, and
Versal Gen 2 platforms. Extend the same support to Zynq UltraScale+
MPSoC (ZU+) to align its behavior with newer SoCs.

Change-Id: Ic77926033e76a53c0fa1a9949e6838ec64bd6ae5
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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Merge changes from topic "xlnx_armclang_fix" into integration

* changes:
fix(versal2): move plat_core_pos_by_mpidr to asm
fix(versal-net): move plat_core_pos_by_mpidr to asm

Merge changes from topic "xlnx_misra_fix_gen_arm" into integration

* changes:
fix(arm-drivers): add missing curly braces
fix(arm): typecast operands to match data type
fix(arm-drivers): declar

Merge changes from topic "xlnx_misra_fix_gen_arm" into integration

* changes:
fix(arm-drivers): add missing curly braces
fix(arm): typecast operands to match data type
fix(arm-drivers): declare unused parameters as void

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fix(versal-net): move plat_core_pos_by_mpidr to asm

In the current implementation, plat_core_pos_by_mpidr() is defined
in C. When BL31 is compiled with Armclang, a call to
plat_core_pos_by_mpidr() f

fix(versal-net): move plat_core_pos_by_mpidr to asm

In the current implementation, plat_core_pos_by_mpidr() is defined
in C. When BL31 is compiled with Armclang, a call to
plat_core_pos_by_mpidr() from plat_my_core_pos() results in the
return address stored in register x30 becoming invalid and register
x9 (used later) ends up with the value 0x0. Consequently, the CPU
branches to address 0x0, triggering a synchronous exception. TF-A
then invokes the BHB flush code before resuming execution. However,
since the stack is not properly initialized at this stage, the system
eventually enters plat_panic_handler(). In the updated implementation,
the platform_get_core_pos() function is redefined in assembly to
provide tighter control during early boot stages. The MPIDR_EL1
register contains three affinity levels: Aff0 (bits [0:7]), Aff1
(bits [8:15]), and Aff2 (bits [16:23]). In this assembly function,
the core ID is extracted from Aff1 (MPIDR_AFF1_SHIFT), and the cluster
ID from Aff2 (MPIDR_AFF2_SHIFT). The macro PLATFORM_MPIDR_AFFINITY_MASK
introduced to mask MPIDR_EL1 register.

Change-Id: I090ea107c27dfa643431a97d15556c98f721b2e4
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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fix(versal): update integer const with suffix U

Versal: standardize unsigned integer constants to use suffix.
Updated all unsigned integer constants in the Versal platform
to use the unsigned suffix

fix(versal): update integer const with suffix U

Versal: standardize unsigned integer constants to use suffix.
Updated all unsigned integer constants in the Versal platform
to use the unsigned suffix (e.g., `10U`)
instead of the prefix style (e.g., `U(10)`) for consistency.

Change-Id: Ie4d20c18cccede20062d6189c1024acfb3a3dce0
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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